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International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) (1999)
Atlantic City, NJ
Sept. 28, 1999 to Sept. 30, 1999
ISSN: 1089-3539
ISBN: 0-7803-5753-1
pp: 892
Gert Jan van Rootselaar , Philips Research Laboratories
Bart Vermeulen , Philips Research Laboratories
For today?s multi-million transistor designs, existing design verification techniques cannot guarantee that first silicon is designed error free. Therefore, techniques are necessary to efficiently debug first-silicon. In this article, we present a methodology for debugging multiple clock domain systems-on-a-chip. In addition to scan chains, a set of Design-for-Debug modules is designed into an IC to make it debuggable. Debugger tool software interacts with the on-chip DfD to make the debug features available from a workstation.

G. J. Rootselaar and B. Vermeulen, "Silicon Debug: Scan Chains Alone Are Not Enough," International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034)(ITC), Atlantic City, NJ, 1999, pp. 892.
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