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System Synthesis, International Symposium on (1999)
Boca Raton, Florida
Nov. 1, 1999 to Nov. 4, 1999
ISSN: 1080-1820
ISBN: 0-7695-0356-X
TABLE OF CONTENTS
Session 1: Invited Talks
Session 2: Embedded Tutorial: Java Compilation Technology

Embedded Java: Techniques and Applications (Abstract)

Brian Barry John Duimovich , Object Technology International Incorporated
pp. 6
Panel: System-Level Design: Designers' Wish List vs. Reality

System-Level Design: Designers' Wish List vs. Reality (Abstract)

Daniel Gajski , University of California at Irvine
Reinaldo Bergamaschi , IBM T. J. Watson Research Center
pp. 8
Session 3: Invited Talk
Session 4: Embedded Tutorial
Session 5: Real-Time and Low Power System Design

Event-Driven Power Management of Portable Systems (Abstract)

Tajana Simunic , Stanford University
Giovanni de Micheli , Stanford University
Luca Benini , Universit? di Bologna
pp. 18

Real-Time Task Scheduling for a Variable Voltage Processor (Abstract)

Hiroto Yasuura , Kyushu University
Takanori Okuma , Kyushu University
Tohru Ishihara , Kyushu University
pp. 24
Session 6: Performance Issues in System Design

Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs (Abstract)

Heinrich Meyr , Integrated Signal Processing Systems
Jens Horstmannshoff , Integrated Signal Processing Systems
pp. 38

RTGEN: An Algorithm for Automatic Generation of Reservation Tables from Architectural Descriptions (Abstract)

Nikil Dutt , University of California at Irvine
Alex Nicolau , University of California at Irvine
Peter Grun , University of California at Irvine
Ashok Halambi , University of California at Irvine
pp. 44

Pre-Fetching for Improved Core Interfacing (Abstract)

Frank Vahid , University of California at Riverside
Tony Givargis , University of California at Riverside
Rilesh Patel , University of California at Riverside
Roman Lysecky , University of California at Riverside
pp. 51

Compressed Code Execution on DSP Architectures (Abstract)

Guido Araujo , IC-UNICAMP
Paulo Centoducatte , IC-UNICAMP
Ricardo Pannain , II-PUC Campinas
pp. 56
Session 7: Memory Design for Embedded Systems

Loop Scheduling and Partitions for Hiding Memory Latencies (Abstract)

Edwin Hsing-Mean Sha , University of Notre Dame
Fei Chen , University of Notre Dame
pp. 64

Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications (Abstract)

H. de Man , IMEC and Katholieke University of Leuven
D. Verkest , IMEC
F. Catthoor , IMEC and Katholieke University of Leuven
pp. 85
Session 8: Architectural Synthesis

Efficient Scheduling of DSP Code on Processors with Distributed Register Files (Abstract)

Koen Van Eijk , Eindhoven University of Technology
Bart Mesman , Philips Research Laboratories
Carlos A. Alba Pinto , Eindhoven University of Technology
pp. 100

Automatic Architectural Synthesis of VLIW and EPIC Processors (Abstract)

B. Ramakrishna Rau , Hewlett-Packard Laboratories
Vinod Kathail , Hewlett-Packard Laboratories
Shail Aditya , Hewlett-Packard Laboratories
pp. 107

Bit-Width Selection for Data-Path Implementations (Abstract)

Octavio Nieto-Taladriz , Universidad Polit?cnica de Madrid
Juan A. López , Universidad Polit?cnica de Madrid
Carlos Carreras , Universidad Polit?cnica de Madrid
pp. 114
Session 9: System Design Methodologies

Catalyst: A DSIP Design Flow Development in Industry (Abstract)

W. de Rammelaere , Motorola SPS
K. Eckert , Motorola SPS
P. Le Moenner , Motorola SPS
R. McGarity , Motorola SPS
T. Lawell , Motorola SPS
E. Hilkens , Motorola SPS
F. Steininger , Motorola SPS
pp. 122

System Synthesis of Synchronous Multimedia Applications (Abstract)

Malena Mesarina , University of California at Los Angeles
Miodrag Potkonjak , University of California at Los Angeles
Gang Qu , University of California at Los Angeles
pp. 128

A Framework for Scheduling and Context Allocation in Reconfigurable Computing (Abstract)

R. Hermida , Universidad Complutense
R. Maestre , Universidad Complutense
N. Bagherzadeh , University of California at Irvine
M. Fernandez , Universidad Complutense
pp. 134

Index of Authors (PDF)

pp. 141
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