The Community for Technology Leaders
System Synthesis, International Symposium on (1996)
San Diego, CA
Nov. 6, 1996 to Nov. 8, 1996
ISSN: 1080-1820
ISBN: 0-8186-7563-2
TABLE OF CONTENTS

Reviewers (PDF)

pp. xi
Session 1: System-Level Synthesis I

System-Level Synthesis of Application Specific Systems using A* Search and Generalized Force-Directed Heuristics (Abstract)

Wayne Wolf , Princeton University
Chunho Lee , University of California, Los Angeles
Miodrag Potkonjak , University of California, Los Angeles
pp. 2

Grammar-based Hardware Synthesis of Data Communication Protocols (Abstract)

Anshul Kumar , Institute of Technology
Ahmed Royal , Institute of Technology
Johnny OEberg , Institute of Technology
pp. 14

Breakpoints and Breakpoint Detection in Source Level Emulation (Abstract)

Gernot Koch , Forschungszentrum Informatik (FZI)
Wolfgang Rosenstiel , FZI and University of Tubingen
Udo Kebschull , Forschungszentrum Informatik (FZI)
pp. 26
Session 2: High-Level Synthesis

Layout-driven RTL binding techniques for high-level synthesis (Abstract)

Min Xu , Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
F.J. Kurdahi , Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
pp. 33

Eliminating false loops caused by sharing in control path (Abstract)

A. Su , Dept. of Comput. Sci., California Univ., Riverside, CA, USA
Ta-Yung Liu , Dept. of Comput. Sci., California Univ., Riverside, CA, USA
Yu-Chin Hsu , Dept. of Comput. Sci., California Univ., Riverside, CA, USA
M.T.-C. Lee , Dept. of Comput. Sci., California Univ., Riverside, CA, USA
pp. 39

An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions (Abstract)

Manfred Glesner , Darmstadt University of Technology
Authors: Michael Muench , Darmstadt University of Technology
Norbert Wehn , Siemens AG
pp. 45

A Constructive Method for Exploiting Code Motion (Abstract)

J.A.G. Jess , Eindhoven University of Technology
J.T.J. Van Eijndhoven , Eindhoven University of Technology
C.A.J. Van Eijk , Eindhoven University of Technology
M.J.M. Heijligers , Eindhoven University of Technology
Luiz C. V. dos Santos , Eindhoven University of Technology
pp. 51

Synthesis of low-power selectively-clocked systems from high-level specification (Abstract)

Claudionor Coelho , University of Minas Gerais (UFMG)
P. Vuillod , Stanford University
L. Benini , Stanford University
G. de Micheli , Stanford University
pp. 57
Session 3: Hardware/Software Codesign

Bus-Based Communication Synthesis on System-Level (Abstract)

Manfred Glesner , Darmstadt University of Technology
Michael Gasteier , Darmstadt University of Technology
pp. 65

Hardware/Software Partitioning with Iterative Improvement Heuristics (Abstract)

Alexa Doboli , Technical University of Timisoara
Petru Eles , Linkoping University
Krzysztof Kuchcinski , Linkoping University
Zebo Peng1 , Linkoping University
pp. 71

The use of a virtual instruction set for the software synthesis of Hw/Sw embedded systems (Abstract)

W. Fornaciari , ITALTEL-SIT, Milan, Italy
M. Vincenzi , ITALTEL-SIT, Milan, Italy
A. Balboni , ITALTEL-SIT, Milan, Italy
D. Sciuto , ITALTEL-SIT, Milan, Italy
pp. 77
Session 4: Programmable Processor Based Design and Synthesis

Memory Organization for Improved Data Cache Performance in Embedded Processors (Abstract)

Alexandru Nicolau , University of California
Nikil D. Dutt , University of California
Preeti Ranjan Panda , University of California
pp. 90

DSP processor/compiler co-design: a quantitative approach (Abstract)

S. Pees , Integrated Syst. for Signal Process., Tech. Hochschule Aachen, Germany
C. Schlager , Integrated Syst. for Signal Process., Tech. Hochschule Aachen, Germany
R. Schoenen , Integrated Syst. for Signal Process., Tech. Hochschule Aachen, Germany
H. Meyr , Integrated Syst. for Signal Process., Tech. Hochschule Aachen, Germany
V. Zivojnovic , Integrated Syst. for Signal Process., Tech. Hochschule Aachen, Germany
M. Willems , Integrated Syst. for Signal Process., Tech. Hochschule Aachen, Germany
pp. 108
Session 5: System-Level Synthesis II

Modeling Multicomputer Task Allocation as a Vector Packing Problem (Abstract)

James Beck , Delco Electronics Corp.
Daniel Siewiorek , Carnegie Mellon University
pp. 115

Throughput Optimization in Disk-Based Real-Time Application Specific Systems (Abstract)

Inki Hong , University of California, Los Angeles
Stephen Docy , University of California, Los Angeles
Miodrag Potkonjak , University of California, Los Angeles
pp. 133

Testability Insertion in Behavioral Descriptions (Abstract)

Elizabeth M. Rudnick , University of Illinois
Frank F. Hsu , University of Illinois
Janak H. Patel , University of Illinois
pp. 139

Index of Authors (PDF)

pp. 145
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