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Quality Electronic Design, International Symposium on (2008)
Mar. 17, 2008 to Mar. 19, 2008
ISBN: 978-0-7695-3117-5
pp: 589-593
In 2006, the leading wireless phone industry has introduced literally hundreds of new, different wireless phones, which have been manufactured in approximately 1 billion units, generating revenue of about $128B. The semiconductor revenue has been about $33B. The ASP is declining, both in the wireless phone and semiconductor industry. In order to fix that, Moore's Law is being inverted: instead of getting twice the transistors for the same cost, the wireless phones industry seeks to obtain the same number of transistors for half the cost. This is making System-on-chip (SoC) no longer a viable solution. System-in-Package (SiP) looks much more promising.Lack of EDA solutions — especially the A of automation — has so far slowed down the ramp-up of SiP. In this paper we describe the landscape and present a SiP platform solution which addresses the challenges of simplification, cost reduction, quality and reliability improvement, yet allowing exploiting the most recent advances in IC packaging.
System in Package, Co-design, Stack, IO Planning
Anna Fontanelli, "System-in-Package Technology: Opportunities and Challenges", Quality Electronic Design, International Symposium on, vol. 00, no. , pp. 589-593, 2008, doi:10.1109/ISQED.2008.63
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