Quality Electronic Design, International Symposium on (2004)

San Jose, California

Mar. 22, 2004 to Mar. 24, 2004

ISSN: 2003116307

ISBN: 0-7695-2093-6

pp: 63-68

Zuying Luo , Tsinghua University

Zhu Pan , Tsinghua University

Sheldon X.-D. Tan , University of California at Riverside

Yici Cai , Tsinghua University

Xianlong Hong , Tsinghua University

ABSTRACT

This paper presents an efficient method to analyze power distribution networks in the time-domain. Instead of directly analyzing the integration approximated power/ground networks at each time step as previous methods did, the new method first builds the equivalent models for many series RLC-current chains based on their Norton?s form companion models in the original networks, and then the Precondition Conjugate Gradient (PCG) based iterative method is used to solve the reduced networks. The solutions of the original networks then are back solved from that of the reduced networks. Our contribution is the introduction of an efficiency algorithm for reducing RLC power/ground network complexities by exploitation of the regularities in the power/ground networks. Experimental results show that the complexities of reduced networks are typically significantly smaller than that of the original circuits, which makes the new algorithm extremely fast. For instance, power/ground networks with more than one million branches can be solved in a few minutes on modern Sun workstations.

INDEX TERMS

null

CITATION

Zuying Luo,
Zhu Pan,
Sheldon X.-D. Tan,
Yici Cai,
Xianlong Hong,
"Transient Analysis of On-Chip Power Distribution Networks Using Equivalent Circuit Modeling",

*Quality Electronic Design, International Symposium on*, vol. 00, no. , pp. 63-68, 2004, doi:10.1109/ISQED.2004.1283651SEARCH