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2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (2013)
Austin, TX, USA USA
Apr. 21, 2013 to Apr. 23, 2013
ISBN: 978-1-4673-5776-0
pp: 74-85
Jung Ho Ahn , Seoul National University, Korea
Sheng Li , Hewlett-Packard Labs, USA
Seongil O , Seoul National University, Korea
Norman P. Jouppi , Hewlett-Packard Labs, USA
With their significant performance and energy advantages, emerging manycore processors have also brought new challenges to the architecture research community. Manycore processors are highly integrated complex system-on-chips with complicated core and uncore subsystems. The core subsystems can consist of a large number of traditional and asymmetric cores. The uncore subsystems have also become unprecedentedly powerful and complex with deeper cache hierarchies, advanced on-chip interconnects, and high-performance memory controllers. In order to conduct research for emerging manycore processor systems, a microarchitecture-level and cycle-level manycore simulation infrastructure is needed. This paper introduces McSimA+, a new timing simulation infrastructure, to meet these needs. McSimA+ models x86-based asymmetric manycore microarchitectures in detail for both core and uncore subsystems, including a full spectrum of asymmetric cores from single-threaded to multithreaded and from in-order to out-of-order, sophisticated cache hierarchies, coherence hardware, on-chip interconnects, memory controllers, and main memory. McSimA+ is an application-level+ simulator, offering a middle ground between a full-system simulator and an application-level simulator. Therefore, it enjoys the light weight of an application-level simulator and the full control of threads and processes as in a full-system simulator. This paper also explores an asymmetric clustered manycore architecture that can reduce the thread migration cost to achieve a noticeable performance improvement compared to a state-of-the-art asymmetric manycore architecture.
Multicore processing, Instruction sets, Microarchitecture, Hardware, Accuracy

J. H. Ahn, S. Li, S. O and N. P. Jouppi, "McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling," 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, USA USA, 2013, pp. 74-85.
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