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2012 IEEE International Symposium on Performance Analysis of Systems & Software (2012)
New Brunswick, NJ, USA
Apr. 1, 2012 to Apr. 3, 2012
ISBN: 978-1-4673-1143-4
pp: 200-209
SaiRahul Chalamalasetti , University of Massachusetts Lowell, Lowell, USA
Martin Margala , University of Massachusetts Lowell, Lowell, USA
Wim Vanderbauwhede , Hewlett Packard, Houston, TX USA
Mitch Wright , Hewlett Packard, Houston, TX USA
Parthasarathy Ranganathan , Hewlet Packard Labs, Palo Alto, CA, USA
ABSTRACT
Emerging data-centric workloads that operate on and harvest useful insights from large amounts of unstructured data require corresponding new data-centric system architecture optimizations. In particular, with the growing importance of power and cooling costs, a key challenge for such future designs is to achieve increased performance at high energy efficiency. At the same time, recent trends towards better support for reconfigurable logic enable the use of energy-efficient accelerators. Combining these trends, in this paper, we examine the applicability of acceleration in future data-centric system architectures. We focus on an important class of data-centric workloads, real-time unstructured search, or information filtering, where large collections of documents are scored against specific topic profiles, and present an FPGA-based implementation to accelerate such workloads. Our implementation, based on the GiDEL PROCStar IV board using Altera Stratix IV FPGAs, demonstrates excellent performance and energy efficiency, 20 to 40 times better than baseline server systems for typical usage scenarios. Our results also highlight interesting insights for the design of accelerators in future data-centric systems.
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CITATION

M. Margala, W. Vanderbauwhede, S. Chalamalasetti, M. Wright and P. Ranganathan, "Evaluating FPGA-acceleration for real-time unstructured search," 2012 IEEE International Symposium on Performance Analysis of Systems & Software(ISPASS), New Brunswick, NJ, USA, 2012, pp. 200-209.
doi:10.1109/ISPASS.2012.6189226
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