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2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (2011)
Austin, TX USA
Apr. 10, 2011 to Apr. 12, 2011
ISBN: 978-1-61284-367-4
TABLE OF CONTENTS
Papers

Table of contents (PDF)

pp. vii-x

Characterization and dynamic mitigation of intra-application cache interference (Abstract)

Margaret Martonosi , Depts. of Electrical Engineering and Computer Science, Princeton University
Carole-Jean Wu , Depts. of Electrical Engineering and Computer Science, Princeton University
pp. 2-11

A semi-preemptive garbage collector for solid state drives (Abstract)

Sarp Oral , National Center for Computational Sciences, Oak Ridge National Laboratory
Feiyi Wang , National Center for Computational Sciences, Oak Ridge National Laboratory
Junghee Lee , Electrical and Computer Engineering, Georgia Institute of Technology
Youngjae Kim , National Center for Computational Sciences, Oak Ridge National Laboratory
Jongman Kim , Electrical and Computer Engineering, Georgia Institute of Technology
Galen M. Shipman , National Center for Computational Sciences, Oak Ridge National Laboratory
pp. 12-21

PRISM: Zooming in persistent RAM storage behavior (Abstract)

Sangyeun Cho , Computer Science Department, University of Pittsburgh
Ju-Young Jung , Computer Science Department, University of Pittsburgh
pp. 22-31

Evaluation and optimization of multicore performance bottlenecks in supercomputing applications (Abstract)

Stephen W. Keckler , Texas Advanced Computing Center
John D. McCalpin , Texas Advanced Computing Center
Byoung-Do Kim , Texas Advanced Computing Center
Jeff Diamond , The University of Texas at Austin
James C. Browne , Texas Advanced Computing Center
Martin Burtscher , Texas State University
pp. 32-43

Minimizing interference through application mapping in multi-level buffer caches (Abstract)

Mahmut Kandemir , Pennsylvania State University
Christina M Patrick , Pennsylvania State University
Nicholas Voshell , Pennsylvania State University
pp. 44-55

Analyzing the impact of useless write-backs on the endurance and energy consumption of PCM main memory (Abstract)

Bruce Childers , Department of Computer Science, University of Pittsburgh
Daniel Mosse , Department of Computer Science, University of Pittsburgh
Rami Melhem , Department of Computer Science, University of Pittsburgh
Youtao Zhang , Department of Computer Science, University of Pittsburgh
Santiago Bock , Department of Computer Science, University of Pittsburgh
pp. 56-65

Memory access pattern-aware DRAM performance model for multi-core systems (Abstract)

Wonyong Sung , School of Electrical Engineering, Seoul National University, 599 Gwanak-ro, Gwanak-gu, Seoul, 151-744 Korea
Hyojin Choi , School of Electrical Engineering, Seoul National University, 599 Gwanak-ro, Gwanak-gu, Seoul, 151-744 Korea
Jongbok Lee , Dept. of Information & Communications Engineering, Hansung University, 389 Samseon-dong 2-ga, Seongbuk-gu, Seoul, 136-792 Korea
pp. 66-75

Characterizing multi-threaded applications based on shared-resource contention (Abstract)

Mary Lou Soffa , Department of Computer Science, University of Virginia, Charlottesville, VA 22904
Wei Wang , Department of Computer Science, University of Virginia, Charlottesville, VA 22904
Jack W. Davidson , Department of Computer Science, University of Virginia, Charlottesville, VA 22904
Tanima Dey , Department of Computer Science, University of Virginia, Charlottesville, VA 22904
pp. 76-86

Trace-driven simulation of multithreaded applications (Abstract)

Alex Ramirez , Barcelona Supercomputing Center, Centro Nacional de Supercomputacion, Barcelona, Spain
Alejandro Duran , Barcelona Supercomputing Center, Centro Nacional de Supercomputacion, Barcelona, Spain
Yoav Etsion , Barcelona Supercomputing Center, Centro Nacional de Supercomputacion, Barcelona, Spain
Alejandro Rico , Barcelona Supercomputing Center, Centro Nacional de Supercomputacion, Barcelona, Spain
Felipe Cabarcas , Barcelona Supercomputing Center, Centro Nacional de Supercomputacion, Barcelona, Spain
Mateo Valero , Barcelona Supercomputing Center, Centro Nacional de Supercomputacion, Barcelona, Spain
pp. 87-96

Efficient memory tracing by program skeletonization (Abstract)

Alain Ketterlin , INRIA team CAMUS and ICPS/LSIIT, CNRS, Université de Strasbourg (France)
Philippe Clauss , INRIA team CAMUS and ICPS/LSIIT, CNRS, Université de Strasbourg (France)
pp. 97-106

Finding cool code: An analysis of source-level causes of temperature effects (Abstract)

Dan Upton , Department of Computer Science, University of Virginia
Kim Hazelwood , Department of Computer Science, University of Virginia
pp. 117-118

A reconfigurable simulator for large-scale heterogeneous multicore architectures (Abstract)

Kevin Skadron , Department of Computer Science, University of Virginia
Jiayuan Meng , Department of Computer Science, University of Virginia
pp. 119-120

Towards a scalable data center-level evaluation methodology (Abstract)

Thomas F. Wenisch , Advanced Computer Architecture Lab, The University of Michigan
Junjie Wu , Advanced Computer Architecture Lab, The University of Michigan
David Meisner , Advanced Computer Architecture Lab, The University of Michigan
pp. 121-122

Storage I/O generation and replay for datacenter applications (Abstract)

Kushagra Vaid , Microsoft, Redmond, WA
Christina Delimitrou , Electrical Engineering Department, Stanford University, Stanford, CA
Sriram Sankar , Microsoft, Redmond, WA
Christos Kozyrakis , Electrical Engineering Department, Stanford University, Stanford, CA
pp. 123-124

VMAD: A virtual machine for advanced dynamic analysis of programs (Abstract)

Vincent Loechner , INRIA Nancy-Grand Est (CAMUS), LSIIT Lab., CNRS, University of Strasbourg, France
Philippe Clauss , INRIA Nancy-Grand Est (CAMUS), LSIIT Lab., CNRS, University of Strasbourg, France
Alexandra Jimborean , INRIA Nancy-Grand Est (CAMUS), LSIIT Lab., CNRS, University of Strasbourg, France
Matthieu Herrmann , INRIA Nancy-Grand Est (CAMUS), LSIIT Lab., CNRS, University of Strasbourg, France
pp. 125-126

A comparative benchmarking of the FFT on Fermi and Evergreen GPUs (Abstract)

Omar Haridy , Media Engineering and Technology, German University in Cairo, Cairo, Egypt
Mohamed F. Ahmed , Computer Science and Engineering, The American University in Cairo, Cairo, Egypt
pp. 127-128

Supply voltage emulation platform for DVFS voltage drop compensation explorations (Abstract)

Christian Bachmann , Institute for Technical Informatics, Graz University of Technology, Austria
Christian Steger , Institute for Technical Informatics, Graz University of Technology, Austria
Andreas Genser , Institute for Technical Informatics, Graz University of Technology, Austria
Josef Haid , Infineon Technologies Austria AG, Design Center Graz, Austria
Reinhold Weiss , Institute for Technical Informatics, Graz University of Technology, Austria
pp. 129-130

Performance characterization of mobile-class nodes: Why fewer bits is better (Abstract)

Kim Hazelwood , Department of Computer Science, University of Virginia
Michelle McDaniel , Department of Computer Science, University of Virginia
pp. 131-132

Where is the data? Why you cannot debate CPU vs. GPU performance without the answer (Abstract)

Kim Hazelwood , Department of Computer Science, University of Virginia
Chris Gregg , Department of Computer Science, University of Virginia
pp. 134-144

Accelerating search and recognition workloads with SSE 4.2 string and text processing instructions (Abstract)

Guangyu Shi , University of Wisconsin-Madison
Mikko Lipasti , University of Wisconsin-Madison
Min Li , University of Wisconsin-Madison
pp. 145-153

A comprehensive analysis and parallelization of an image retrieval algorithm (Abstract)

Binyu Zang , Parallel Processing Institute, Fudan University
Weihua Zhang , Parallel Processing Institute, Fudan University
Zhenman Fang , The State Key Lab of ASIC & System, Fudan University
Haibo Chen , Parallel Processing Institute, Fudan University
Donglei Yang , Parallel Processing Institute, Fudan University
pp. 154-164

Performance evaluation of adaptivity in software transactional memory (Abstract)

Mathias Payer , ETH Zurich, Switzerland
Thomas R. Gross , ETH Zurich, Switzerland
pp. 165-174

Scalable, accurate multicore simulation in the 1000-core era (Abstract)

Christopher W. Fletcher , Massachusetts Institute of Technology, Cambridge, MA, USA
Srinivas Devadas , Massachusetts Institute of Technology, Cambridge, MA, USA
Myong Hyon Cho , Massachusetts Institute of Technology, Cambridge, MA, USA
Omer Khan , Massachusetts Institute of Technology, Cambridge, MA, USA
Mieszko Lis , Massachusetts Institute of Technology, Cambridge, MA, USA
Pengju Ren , Xi'an Jiaotong University, Xi'an, China
Keun Sup Shim , Massachusetts Institute of Technology, Cambridge, MA, USA
pp. 175-185

A single-specification principle for functional-to-timing simulator interface design (Abstract)

David A. Penry , Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA
pp. 186-196

WiLIS: Architectural modeling of wireless systems (Abstract)

Kermin Elliott Fleming , CSAIL, Massachusetts Institute of Technology
Samuel Gross , CSAIL, Massachusetts Institute of Technology
Man Cheuk Ng , CSAIL, Massachusetts Institute of Technology
Arvind , CSAIL, Massachusetts Institute of Technology
pp. 197-206

Detecting race conditions in asynchronous DMA operations with full system simulation (Abstract)

Michael Kistler , IBM Corporation Austin, TX 78758
Daniel Brokenshire , IBM Corporation Austin, TX 78758
pp. 207-215

Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware (Abstract)

Lieven Eeckhout , ELIS Department, Ghent University, Belgium
Kenneth Hoste , ELIS Department, Ghent University, Belgium
Stijn Eyerman , ELIS Department, Ghent University, Belgium
pp. 216-226

Power signature analysis of the SPECpower_ssj2008 benchmark (Abstract)

Chung-Hsing Hsu , Computer Science and Mathematics Division, Oak Ridge National Laboratory, Oak Ridge, TN 37831
Stephen W. Poole , Computer Science and Mathematics Division, Oak Ridge National Laboratory, Oak Ridge, TN 37831
pp. 227-236

Analyzing throughput of GPGPUs exploiting within-die core-to-core frequency variation (Abstract)

Jungseob Lee , Department of Electrical and Computer Engineering, University of Wisconsin-Madison
Nam Sung Kim , Department of Electrical and Computer Engineering, University of Wisconsin-Madison
Paritosh Pratap Ajgaonkar , Department of Electrical and Computer Engineering, University of Wisconsin-Madison
pp. 237-246

Universal rules guided design parameter selection for soft error resilient processors (Abstract)

Bin Li , Department of Experimental Statistics, Louisiana State University, Baton Rouge, LA 70803
Lide Duan , Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA 70803
Lu Peng , Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA 70803
Ying Zhang , Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA 70803
pp. 247-256

A dynamic energy management scheme for multi-tier data centers (Abstract)

Seung-Hwan Lim , Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802
Bikash Sharma , Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802
Byung Chul Tak , Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802
Chita R. Das , Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA 16802
pp. 257-266

Author index (PDF)

pp. 267-268
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