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2007 IEEE International Symposium on Performance Analysis of Systems & Software (2007)
San Jose, CA
Apr. 25, 2007 to Apr. 27, 2007
ISBN: 1-4244-1081-9
TABLE OF CONTENTS
Papers

Covers (PDF)

pp. C1

Commentary (PDF)

pp. iii

Commentary (PDF)

pp. iv-v

Table of Contents (PDF)

pp. ix-xii
Papers

Accelerating Full-System Simulation through Characterizing and Predicting Operating System Performance (Abstract)

null Seongbeom Kim , North Carolina State Univ., Raleigh, NC
null Fang Liu , North Carolina State Univ., Raleigh, NC
null Yan Solihin , North Carolina State Univ., Raleigh, NC
pp. 1-11

A Comparison of Two Approaches to Parallel Simulation of Multiprocessors (Abstract)

A. Over , Dept. of Comput. Sci., Australian Nat. Univ., Canberra, ACT
B. Clarke , Dept. of Comput. Sci., Australian Nat. Univ., Canberra, ACT
P. Strazdins , Dept. of Comput. Sci., Australian Nat. Univ., Canberra, ACT
pp. 12-22

PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator (Abstract)

M.T. Yourst , Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY
pp. 23-34

Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation (Abstract)

null Wenlong Li , Intel Corp., Santa Clara, CA
E. Li , Intel Corp., Santa Clara, CA
A. Jaleel , Intel Corp., Santa Clara, CA
null Jiulong Shan , Intel Corp., Santa Clara, CA
null Yurong Chen , Intel Corp., Santa Clara, CA
null Qigang Wang , Intel Corp., Santa Clara, CA
R. Iyer , Intel Corp., Santa Clara, CA
R. Illikkal , Intel Corp., Santa Clara, CA
null Yimin Zhang , Intel Corp., Santa Clara, CA
null Dong Liu , Intel Corp., Santa Clara, CA
M. Liao , Intel Corp., Santa Clara, CA
null Wei Wei , Intel Corp., Santa Clara, CA
J. Du , Intel Corp., Santa Clara, CA
pp. 35-43

Performance Characterization of Decimal Arithmetic in Commercial Java Workloads (Abstract)

M. Bhat , Intel Corp., Santa Clara, CA
J. Crawford , Intel Corp., Santa Clara, CA
R. Morin , Intel Corp., Santa Clara, CA
K. Shiv , Intel Corp., Santa Clara, CA
pp. 54-61

Performance Impact of Unaligned Memory Operations in SIMD Extensions for Video Codec Applications (Abstract)

M. Alvarez , Dept. of Comput. Archit., Univ. Politecnica de Catalunya
E. Salami , Dept. of Comput. Archit., Univ. Politecnica de Catalunya
A. Ramirez , Dept. of Comput. Archit., Univ. Politecnica de Catalunya
M. Valero , Dept. of Comput. Archit., Univ. Politecnica de Catalunya
pp. 62-71

Combining Simulation and Virtualization through Dynamic Sampling (Abstract)

A. Falcon , Adv. Archit. Lab., Hewlett-Packard Labs., Barcelona
P. Faraboschi , Adv. Archit. Lab., Hewlett-Packard Labs., Barcelona
D. Ortega , Adv. Archit. Lab., Hewlett-Packard Labs., Barcelona
pp. 72-83

Phase-Guided Small-Sample Simulation (Abstract)

J.L. Kihm , Dept. of Electr.&Comput. Eng., Colorado Univ., Boulder, CO
S.D. Strom , Dept. of Electr.&Comput. Eng., Colorado Univ., Boulder, CO
D.A. Connors , Dept. of Electr.&Comput. Eng., Colorado Univ., Boulder, CO
pp. 84-93

Last-Touch Correlated Data Streaming (Abstract)

M. Ferdman , Comput. Archit. Lab., Carnegie Mellon Univ., Pittsburgh, PA
B. Falsafi , Comput. Archit. Lab., Carnegie Mellon Univ., Pittsburgh, PA
pp. 105-115

Using Model Trees for Computer Architecture Performance Analysis of Software Applications (Abstract)

E. Ould-Ahmed-Vall , Intel Corp., Chandler, AZ
J. Woodlee , Intel Corp., Chandler, AZ
C. Yount , Intel Corp., Chandler, AZ
K.A. Doshi , Intel Corp., Chandler, AZ
S. Abraham , Intel Corp., Chandler, AZ
pp. 116-125

Modeling and Single-Pass Simulation of CMP Cache Capacity and Accessibility (Abstract)

null Xudong Shi , Dept. of Comput.&Inf. Sci.&Eng., Florida Univ., Gainesville, FL
null Feiqi Su , Dept. of Comput.&Inf. Sci.&Eng., Florida Univ., Gainesville, FL
null Jih-Kwon Peir , Dept. of Comput.&Inf. Sci.&Eng., Florida Univ., Gainesville, FL
null Ye Xia , Dept. of Comput.&Inf. Sci.&Eng., Florida Univ., Gainesville, FL
null Zhen Yang , Dept. of Comput.&Inf. Sci.&Eng., Florida Univ., Gainesville, FL
pp. 126-135

Using Wavelet Domain Workload Execution Characteristics to Improve Accuracy, Scalability and Robustness in Program Phase Analysis (Abstract)

null Chang-Burm Cho , Dept. of Electr.&Comput. Eng., Florida Univ., Gainesville, FL
null Tao Li , Dept. of Electr.&Comput. Eng., Florida Univ., Gainesville, FL
pp. 136-145

Modeling and Characterizing Power Variability in Multicore Architectures (Abstract)

null Ke Meng , Dept. of Electr. Eng.&Comput. Sci., Northwestern Univ., Evanston, IL
F. Huebbers , Dept. of Electr. Eng.&Comput. Sci., Northwestern Univ., Evanston, IL
R. Joseph , Dept. of Electr. Eng.&Comput. Sci., Northwestern Univ., Evanston, IL
Y. Ismail , Dept. of Electr. Eng.&Comput. Sci., Northwestern Univ., Evanston, IL
pp. 146-157

Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events (Abstract)

W.L. Bircher , Dept. of Electr.&Comput. Eng., Texas Univ., Austin, TX
L.K. John , Dept. of Electr.&Comput. Eng., Texas Univ., Austin, TX
pp. 158-168

An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures (Abstract)

null Wangyuan Zhang , Dept. of Electr.&Comput. Eng., Florida Univ., Gainesville, FL
null Xin Fu , Dept. of Electr.&Comput. Eng., Florida Univ., Gainesville, FL
null Tao Li , Dept. of Electr.&Comput. Eng., Florida Univ., Gainesville, FL
J. Fortes , Dept. of Electr.&Comput. Eng., Florida Univ., Gainesville, FL
pp. 169-178

Cross Binary Simulation Points (Abstract)

E. Perelman , Dept. of Comput. Sci.&Eng., California Univ., San Diego, CA
J. Lau , Dept. of Comput. Sci.&Eng., California Univ., San Diego, CA
pp. 179-189

Reverse State Reconstruction for Sampled Microarchitectural Simulation (Abstract)

P.D. Bryan , Center for Efficient, Secure&Reliable Comput., North Carolina State Univ., Raleigh, NC
M.C. Rosier , Center for Efficient, Secure&Reliable Comput., North Carolina State Univ., Raleigh, NC
T.M. Conte , Center for Efficient, Secure&Reliable Comput., North Carolina State Univ., Raleigh, NC
pp. 190-199

Performance Analysis of Cell Broadband Engine for High Memory Bandwidth Applications (Abstract)

D. Jimenez-Gonzalez , Dept. of Comput. Archit., Univ. Politecnica de Catalunya, Barcelona
X. Martorell , Dept. of Comput. Archit., Univ. Politecnica de Catalunya, Barcelona
A. Ramirez , Dept. of Comput. Archit., Univ. Politecnica de Catalunya, Barcelona
pp. 210-219

Benefits of I/O Acceleration Technology (I/OAT) in Clusters (Abstract)

K. Vaidyanathan , Dept. of Comput. Sci.&Eng., Ohio State Univ., Columbus, OH
D.K. Panda , Dept. of Comput. Sci.&Eng., Ohio State Univ., Columbus, OH
pp. 220-229

CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications (Abstract)

null Sangyeun Cho , Dept. of Comput. Sci., Pittsburgh Univ., PA
J.R. Martin , Dept. of Comput. Sci., Pittsburgh Univ., PA
null Ruibin Xu , Dept. of Comput. Sci., Pittsburgh Univ., PA
M.H. Hammoud , Dept. of Comput. Sci., Pittsburgh Univ., PA
R. Melhem , Dept. of Comput. Sci., Pittsburgh Univ., PA
pp. 230-241

Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads (Abstract)

D.D. Kalamkar , Syst. Res. Center, Intel Technol. India Pvt. Ltd., Bangalore
pp. 242-253

Author Index (PDF)

pp. 255
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