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2013 IEEE 43rd International Symposium on Multiple-Valued Logic (2004)
University of Toronto, Toronto, Canada
May 19, 2004 to May 22, 2004
ISSN: 0195-623X
ISBN: 0-7695-2130-4
TABLE OF CONTENTS
Introduction

Referees (PDF)

pp. xiv
Session 1 Keynote Address
Session 2A Emerging Technologies
Session 2B Logic

Automata over MV-Algebras (Abstract)

Brunella Gerla , University of Salerno
pp. 49-54
Session 3 Invited Address
Session 4A Reversible Logic

On Universality of General Reversible Multiple-Valued Logic Gates (Abstract)

Pawel Kerntopf , Warsaw University of Technology
Marek A. Perkowski , Portland State University
Mozammel H. A. Khan , East West University
pp. 68-73

A Synthesis Method for MVL Reversible Logic (Abstract)

Dmitri Maslov , University of Victoria
D. Michael Miller , University of Victoria
Gerhard W. Dueck , University of New Brunswick
pp. 74-80
Session 4B Clones

On Partial Clones containing Maximal Clones (Abstract)

Dietlinde Lau , Universität Rostock
Lucien Haddad , Collège Militaire Royal du Canada
pp. 96-101

Monoids whose Centralizer is the Least Clone (Abstract)

Hajime Machida , Hitotsubashi University
Ivo G. Rosenberg , Université de Montréal
pp. 102-108

Algebraic Properties of Totally Irreducible Elements of Clone Lattices (Abstract)

Ivo G. Rosenberg , Université deMontréal
Grant R. Pogosyan , International Christian University
pp. 109-114

Minimal Partial Hyperclones on a Two-Element Set (Abstract)

Jovanka Pantović , University of Novi Sad
Gradimir Vojvodić , University of Novi Sad
pp. 115-119

Some Properties of Local Partial Clones on an Infinite Set (Abstract)

B. A. Romov , Bayard Rustin High School for the Humanities
pp. 120-125
Session 5A Circuits I

A Systolic Parallel Multiplier over GF(3m) Using Neuron-MOS DLC (Abstract)

Omid Mirmotahari , University of Oslo
Yngvar Berg , University of Oslo
pp. 135-138
Sesion 5B Fuzzy Logic and Learning

A Metasemantics to Refine Fuzzy If-Then Rules (Abstract)

Claudio Moraga , University of Dortmund
pp. 148-153

Evolutionary Strategy for Learning Multiple-Valued Logic Functions (Abstract)

Ivan Stojmenović , University of Ottawa
Alioune Ngom , University of Windsor
Dan A. Simovici , University of Massachusetts at Boston
pp. 154-160
Session 6A Reed Muller Expansions

Fast Optimization of Fixed-Polarity Reed-Muller Expansions over GF(5) (Abstract)

Cicilia C. Lozano , Nanyang Technological University
Bogdan J. Falkowski , Nanyang Technological University
Susanto Rahardja , Institute for Infocomm Research
pp. 162-167

On the Optimisation of Reed-Muller Expressions (Abstract)

K. J. Adams , University of Ulster
J. McGregor , University of Ulster
pp. 168-176

Spectra Generation for Fixed-Polarity Reed-Muller Transform over GF(5) (Abstract)

Cicilia C. Lozano , Nanyang Technological University
Susanto Rahardja , Institute for Infocomm Research
Bogdan J. Falkowski , Nanyang Technological University
pp. 177-183
Session 6B Circuits II

Intra-Chip Address-Presetting Data-Transfer Scheme Using Four-Valued Encoding (Abstract)

Takahiro Hanyu , Tohoku University
Akira Mochizuki , Tohoku University
Takashi Takeuchi , Tohoku University
pp. 192-197
Session 7 Round Table Discussion
Session 8A MDDs

On the Minimization of Average Path Lengths for Heterogeneous MDDs (Abstract)

Shinobu Nagayama , Kyushu Institute of Technology
Tsutomu Sasao , Kyushu Institute of Technology
pp. 216-222

Algorithms for Taylor Expansion Diagrams (Abstract)

Rolf Drechsler , University of Bremen
Goerschwin Fey , University of Bremen
Maciej Ciesielski , University of Massachusetts at Amherst
pp. 235-240
Session 8B Mathematical Aspects

Polynomial Functions on a Central Relation (Abstract)

Dietmar Schweigert , University of Kaiserslautern
pp. 242-244

A Graph-Theoretical Approach to Boolean Interpolation of Non-Boolean Functions (Abstract)

Sergiu Rudeanu , University of Bucharest
Dan A. Simovici , University of Massachusetts at Boston
pp. 245-250

The Interface between P and NP in Signed CNF Formulas (Abstract)

C. Ansótegui , Universitat de Lleida
R. Béjar , Universitat de Lleida
F. Manyà , Universitat de Lleida
A. Cabiscol , Universitat de Lleida
pp. 251-256
Session 9A Single Electron Logic

Three Dimensional Multiple Valued Circuits Design Based on Single-Electron Logic (Abstract)

D. C. Lu , University of Calgary
S. N. Yanushkevich , University of Calgary
V. P. Shmerko , University of Calgary
L. Guy , University of Calgary
pp. 275-280
Session 9B Probability & Uncertainty

Non-Deterministic Matrices (Abstract)

Iddo Lev , Stanford University
Arnon Avron , Tel-Aviv University
pp. 282-287

Controlling Uncertainty in Discretization of Continuous Data (Abstract)

Denis V Popel , Baker University
Elena I Popel , Kansas University
pp. 288-293

Many Valued Probability Theory (Abstract)

Charles G. Morgan , University of Victoria
pp. 294-299
Session 10A Digital Design

A Method to Evaluate Logic Functions in the Presence of Unknown Inputs Using LUT Cascades (Abstract)

Tsutomu Sasao , Kyushu Institute of Technology
Yukihiro Iguchi , Meiji University
Munehiro Matsuura , Kyushu Institute of Technology
pp. 302-308

Iterative-Based Minimization of Unary 4-Valued Functions for Current-Mode CMOS Realization (Abstract)

Louai Al-Awami , King Fahd University of Petroleum & Minerals
Mostafa Abd-El-Barr , King Fahd University of Petroleum & Minerals
pp. 315-320

On the Minimization of Multiple-Valued Input Binary-Valued Output Functions (Abstract)

Md. Mazder Rahman , University of Dhaka
Hafiz Md. Hasan Babu , University of Dhaka
Md.Rafiqul Islam , University of Dhaka
Moinul Islam Zaber , University of Dhaka
pp. 321-326
Session 10B Circuits III

Design and Verification of Parallel Multipliers Using Arithmetic Description Language: ARITH (Abstract)

Kazuya Ishida , Tohoku University
Tatsuo Higuchi , Tohoku Institute of Technology
Naofumi Homma , Tohoku University
Takafumi Aoki , Tohoku University
pp. 334-339

A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices (Abstract)

Ali Sheikholeslami , University of Toronto
Takahiro Hanyu , Tohoku University
Hiromitsu Kimura , Tohoku University
Kostas Pagiamtzis , University of Toronto
pp. 340-345

Basic Multiple-Valued Functions Using Recharge CMOS Logic (Abstract)

O. Mirmotahari , University of Oslo
?. N?ss , University of Oslo
S. Aunet , Norwegian University of Science and Technology
Y. Berg , University of Oslo
pp. 346-351
Author Index

Author Index (PDF)

pp. 352-353
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