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2013 IEEE 43rd International Symposium on Multiple-Valued Logic (2002)
Boston, Massachusetts
May 15, 2002 to May 18, 2002
ISSN: 0195-623X
ISBN: 0-7695-1462-6

Reviewers (PDF)

pp. xi
Invited Talk

Equations in the Algebra of Logic (Abstract)

Sergiu Rudeanu , University of Bucharest
pp. 2
Algebra I

Some Results on the Centralizers of Monoids in Clone Theory (Abstract)

Hajime Machida , Hitotsubashi University
Ivo G. Rosenberg , Université de Montréal
Masahiro Miyakawa , Tsukuba College of Technology
pp. 10

Partial Hyperclones on a Finite Set (Abstract)

B.A. Romov , Bayard Rustin High School for the Humanities
pp. 17
Logical Design I

Improving the Characterization of p-Valued Threshold Functions (Abstract)

Claudio Moraga , Technical University of Madrid, University of Dortmund
pp. 28

A Conjunctive Canonical Expansion of Multiple-Valued Functions (Abstract)

Elena Dubrova , Royal Institute of Technology
Petra Färm , Royal Institute of Technology
pp. 35

Sierpinski Gaskets for Logic Functions Representation (Abstract)

Denis V. Popel , Baker University
Anita Dani , University of Wollongong
pp. 39
Circuits I

Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI (Abstract)

Tatsuya Morishita , Gunma University
Takafumi Aoki , Gunma University
Yasushi Yuminaka , Gunma University
Tatsuo Higuchi , Gunma University
pp. 54

Voltage Comparator Circuits for Multiple-Valued CMOS Logic (Abstract)

Yongjian Brandon Guo , University of California, Davis
K. Wayne Current , University of California, Davis
pp. 67
Logical Design II
Invited Talk

Consequence and Complexity in Infinite-Valued Logic: A Survey (Abstract)

Daniele Mundici , University of Milan
Vincenzo Marra , University of Milan
pp. 104
Spectral Techniques

Chrestenson Spectrum Computation Using Cayley Color Graphs (Abstract)

Whitney J. Townsend , Mississippi State University
Mitchell A. Thornton , Mississippi State University
D. Michael Miller , University of Victoria
pp. 123
Circuits II

Design of Dynamic Reliability Indices (Abstract)

Elena N. Zaitseva , Belarus State Economic University
Vitaly G. Levashenko , Belarus State Economic University, University of Zilina
pp. 144

PODEM Based on Static Testability Measures and Dynamic Testability Measures for Multiple-Valued Logic Circuits (Abstract)

Teijiro Isokawa , Himeji Institute of Technology
Nobuyuki Matsui , Himeji Institute of Technology
Naotake Kamiura , Himeji Institute of Technology
pp. 149

Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics (Abstract)

Penjung Wang , Ningbo University
Yinshui Xia , Napier Universit
Xunwei Wu , Ningbo University
pp. 156
Invited Talk

Optimization of Multi-Valued Multi-Level Networks (Abstract)

S. Sinha , Parades
A. Mishchenko , Portland State University
Y. Li , University of California, Berkeley
R. Brayton , University of California, Berkeley
T. Villa , Parades
Y. Jiang , University of California, Berkeley
M. Gao , University of California, Berkeley
J-H. Jiang , University of California, Berkeley
pp. 168
Algebra II

de Morgan Bisemilattice of Fuzzy Truth Value (Abstract)

Noboru Takagi , Toyama Prefectural University
Hiroaki Kikuchi , Tokai University
pp. 180

On Functions Defined on Free Boolean Algebras (Abstract)

Szymon Jaroszewicz , University of Massachusetts at Boston
Ivo Rosenberg , University of Montreal
Dan A. Simovici , University of Massachusetts at Boston
pp. 192
Logical Design III

Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics (Abstract)

Bernd Becker , Albert-Ludwigs-University
Ilia Polian , Albert-Ludwigs-University
Piet Engelke , Albert-Ludwigs-University
pp. 216
Invited Talk
Decision Diagrams

Variable Selection Heuristics and Optimum Decision Trees -- An Experimental Study (Abstract)

Nobuyuki Otsu , National Institute of AIST
Masahiro Miyakawa , Tsukuba College of Technology
Ivo G. Rosenberg , Université de Montréal
pp. 238

On the Construction of Multiple-Valued Decision Diagrams (Abstract)

D. Michael Miller , University of Victoria
Rolf Drechsler , University of Bremen
pp. 245

Representations of Logic Functions Using QRMDDs (Abstract)

Munehiro Matsuura , Kyushu Institute of Technology
Tsutomu Sasao , Kyushu Institute of Technology
Shinobu Nagayama , Kyushu Institute of Technology
Yukihiro Iguchi , Meiji University
pp. 261
Circuits III

Fully Source-Coupled Logic Based Multiple-Valued VLSI (Abstract)

Tsukasa Ike , Tohoku University
Michitaka Kameyama , Tohoku University
Takahiro Hanyu , Tohoku University
pp. 270

Multi-Valued Flip-Flop with Neuron-CMOS NMIN Circuits (Abstract)

Koichi Tanno , Miyazaki University
Motoi Inaba , Tsukuba College of Technology
Okihiko Ishizuka , Miyazaki University
pp. 282

Author Index (PDF)

pp. 289
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