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2013 IEEE 43rd International Symposium on Multiple-Valued Logic (2001)
Warsaw, Poland
May 22, 2001 to May 24, 2001
ISBN: 0-7695-1083-3
TABLE OF CONTENTS

Preface (PDF)

pp. ix

Referees (PDF)

pp. xi
Session 1: Invited Address

Algebras for Hazard Detection (Abstract)

Y. Iland , University of Waterloo
Z. Ésik , University of Szeged
J.A. Brzozowski , University of Waterloo
pp. 0003
Session 2a: Circuits I

Dual-Rail Multiple-Valued Current-Mode VLSI with Biasing Current Sources (Abstract)

Tsukasa Ike , Tohoku University
Michitaka Kameyama , Tohoku University
Takahiro Hanyu , Tohoku University
pp. 0021

Realization of NMAX and NMIN Functions with Multi-Valued Voltage Comparators (Abstract)

O. Ishizuka , Miyazaki University
M. Inaba , Miyazaki University
K. Tanno , Miyazaki University
pp. 0027
Session 2b: Design and Verification of Systems

Spectral Techniques in Binary and Multiple-Valued Switching Theory (Abstract)

M. Karpovsky , Boston University
R. Stankovic , Beogradska 14
Claudio Moraga , Dortmund University
pp. 0041
Session 3: Invited Address

Tunnelling Diode Technology (Abstract)

K.F. Goser , University of Dortmund
F.-J. Tegude , Gerhard-Mercator-Universit?t Duisburg
O.G. Schmidt , Max-Planck-Institut f?r Festk?rperforschung
W. Prost , Gerhard-Mercator-Universit?t Duisburg
U. Auer , Gerhard-Mercator-Universit?t Duisburg
R. Duschl , Max-Planck-Institut f?r Festk?rperforschung
C. Pacha , University of Dortmund
K. Eberl , Max-Planck-Institut f?r Festk?rperforschung
pp. 0049
Session 4a: Circuits II

Power Efficient Inter-Module Communication for Digit-Serial DSP Architectures In Deep-Submicron Technology (Abstract)

H. Tenhunen , Royal Institute of Technology, Sweden
E. Dubrova , Royal Institute of Technology, Sweden
I. Ben Dhaou , Royal Institute of Technology, Sweden
pp. 0061
Session 4b: Fuzzy Logics and Their Applications I

On Some Classes of Fuzzy Information Relations (Abstract)

Etienne E. Kerre , Ghent University
Anna M. Radzikowska , Warsaw University of Technology
pp. 0075
Session 5a: Circuits III

A Three-valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors (Abstract)

Tetsuya Uemura , System Devices and Fundamental Research, NEC Corporation
Toshio Baba , System Devices and Fundamental Research, NEC Corporation
pp. 0089
Session 5b: Fuzzy Logics and Their Applications II

Evaluation of Inconsistency in a 2-Way Fuzzy Adaptive System Using Shadowed Sets (Abstract)

I. Erkmen , Middle East Technical University
Evren Gürkan , Middle East Technical University
Aydan M. Erkmen , Middle East Technical University
pp. 0109
Session 6: Invited Address
Session 7: Tutorial
Session 8: Invited Address
Session 9a: Logic Design I

Multiple-Valued Galois Field S/D Trees for GFSOP Minimization and Their Complexity (Abstract)

Marek Perkowski , Portland State University
Anas Al-Rabadi , Portland State University
pp. 0159

Multiple-Valued Mask-Programmable Logic Array Using One-Transistor Universal-Literal Circuits (Abstract)

Takahiro Hanyu , Tohoku University
Katsuhiko Shimabukuro , Tohoku University
Michitaka Kameyama , Tohoku University
Chotei Zukeran , University of the Ryukyus
pp. 0167

Decomposition of Multi-Valued Functions into Min- and Max-Gates (Abstract)

Christian Lang , Institute for Microelectronic and Mechatronic Systems
Bernd Steinbach , Institute for Computer Science, Freiberg University of Mining and Technology
pp. 0173
Session 9b: Automated Reasoning and Complexity I

Cut-Elimination in a Sequents-of-Relations Calculus for G?del Logic (Abstract)

Matthias Baaz , Technische Universit?t Wien
Christian G. Fermüller , Technische Universit?t Wien
Agata Ciabattoni , Technische Universit?t Wien
pp. 0181

Model Checking with Multi-Valued Temporal Logics (Abstract)

Marsha Chechik , University of Toronto
Steve Easterbrook , University of Toronto
Benet Devereux , University of Toronto
pp. 0187
Session 10a: Logic Design II

Information Theory Method for Flexible Network Synthesis (Abstract)

V. Shmerko , Technical University of Szczecin
S. Yanushkevich , Technical University of Szczecin
V. Cheushev , State University, Belarus
pp. 0201

Two-Stage Exact Detection of Symmetries (Abstract)

Piotr Dziurzanski , Technical University of Szczecin
Vlad P. Shmerko , Technical University of Szczecin and the State University of Informatics and Radioelectronics
Svetlana N. Yanushkevich , Technical University of Szczecin and the State University of Informatics and Radioelectronics
Anna M. Tomaszewska , Technical University of Szczecin
pp. 0213
Session 10b: Automated Reasoning and Complexity II

A Modular Reduction of Regular Logic to Classical Logic (Abstract)

Ramón Béjar , Cornell University
Felip Manyá , Universitat de Lleida
Reiner Hähnle , Chalmers University of Technology
pp. 0221

Hypersequents as a Uniform Framework for Urquhart's C, MTL, and Related Logics (Abstract)

Agata Ciabattoni , Technische Universit?t Wien
Christian G. Fermüller , Technische Universit?t Wien
pp. 0227
Session 11: Invited Address
Session 12a: Computing Paradigms

A Model of Reaction-Diffusion Cellular Automata for Massively Parallel Molecular Computing (Abstract)

Masahiko Hiratsuka , Sendai National College of Technology
Tatsuo Higuchi , Tohoku University
Takafumi Aoki , Tohoku University
pp. 0247

An Axiomatization of Generalized Entropy of Partitions (Abstract)

Szymon Jaroszewicz , University of Massachusetts at Boston
Dan A. Simovici , University of Massachusetts at Boston
pp. 0259
Session 12b: MV Logics and Algebras I

Many Valued Paraconsistent Logic (Abstract)

Charles G. Morgan , University of Victoria
pp. 0267

Relations between Clones and Full Monoids (Abstract)

Hajime Machida , Hitotsubashi University
Ivo G. Rosenberg , Universit? de Montr?al
Masahiro Miyakawa , Tsukuba College of Technology
pp. 0279
Session 13: Tutorial
Session 14a: Decision Diagrams

Selection of Efficient Re-Ordering Heuristics for MDD Construction (Abstract)

Frank Schmiedle , Albert-Ludwigs-University
Wolfgang Günther , Albert-Ludwigs-University
Rolf Drechsler , Albert-Ludwigs-University
pp. 0299

Bit-Level and Word-Level Polynomial Expressions for Functions in Fibonacci Interconnection Topologies (Abstract)

Jaakko Astola , Tampere University of Technology
Radomir S. Stankovic , Faculty of Electronics
Milena Stankovic , Faculty of Electronics
Karen Egiazarian , Tampere University of Technology
pp. 0305
Session 14b: Fuzzy Logics and Set Theories

A Set Theory within Fuzzy Logic (Abstract)

Petr Hájek , Institute of Computer Science
Zuzana Haniková , Institute of Computer Science
pp. 0319

On a Kleenean Extension of Fuzzy Measure (Abstract)

Masao Mukaidono , Meiji University
Fujio Yamamoto , Kanagawa Institute of Technology
Tomoyuki Araki , Kanagawa Institute of Technology
pp. 0324
Session 15a: Neural Networks

Logic Circuit Diagnosis by Using Neural Networks (Abstract)

Shinji Tokumasu , Kanagawa Institute of Technology
Yasuyuki Murai , Kanagawa Institute of Technology
Hisayuki Tatsumi , Kanagawa Institute of Technology
pp. 0345

The Designing and Training of a Fuzzy Neural Hamming Classifier (Abstract)

Qiang Hua , Huizhou University
Qi-Iun Zhen , South China University of Technology
pp. 0351
Session 15b: MV Logics and Algebras II

Composing Submonads (Abstract)

J. Medina , Universidad de M?laga
M.A. Galán , Ume? University
P. Eklund , Ume? University
M. Ojeda-Aciego , Universidad de M?laga
A. Valverde , Universidad de M?laga
pp. 0367

A Method of Uncertainty Reasoning by Using Information (Abstract)

Jun Liu , Belgian Nuclear Research Centre
Jun Ma , Southwest Jiaotong University
Yang Xu , Southwest Jiaotong University
pp. 0373

Author Index (PDF)

pp. 0379
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