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2011 ACM/IEEE 38th International Symposium on Computer Architecture (ISCA) (2011)
San Jose, CA
June 4, 2011 to June 8, 2011
ISSN: 1063-6897
ISBN: 978-1-4503-0472-6
TABLE OF CONTENTS

Automatic abstraction and fault tolerance in cortical microachitectures (Abstract)

A. Hashmi , Univ. of Wisconsin, Madison, WI, USA
H. Berry , INRIA Rhone-Alpes, Villeurbanne, France
O. Temam , INRIA Saclay, Orsay, France
M. Lipasti , Univ. of Wisconsin, Madison, WI, USA
pp. 1-10

FabScalar: Composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template (Abstract)

N. K. Choudhary , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
S. V. Wadhavkar , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
T. A. Shah , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
H. Mayukh , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
J. Gandhi , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
B. H. Dwiel , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
S. Navada , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
H. H. Najaf-abadi , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
E. Rotenberg , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
pp. 11-22

CRIB: Consolidated rename, issue, and bypass (Abstract)

E. Gunadi , Intel Corp., Santa Clara, CA, USA
M. Lipasti , Dept. of Electr. & Comput. Eng., Univ. of Wisconsin - Madison, Madison, WI, USA
pp. 23-32

OUTRIDER: Efficient memory latency tolerance with decoupled strands (Abstract)

N. C. Crago , Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
S. J. Patel , Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
pp. 117-128

Prefetch-aware shared-resource management for multi-core systems (Abstract)

E. Ebrahimi , HPS Res. Group, Univ. of Texas at Austin, Austin, TX, USA
Chang Joo Lee , HPS Res. Group, Univ. of Texas at Austin, Austin, TX, USA
O. Mutlu , Carnegie Mellon Univ., Pittsburgh, PA, USA
Y. N. Patt , HPS Res. Group, Univ. of Texas at Austin, Austin, TX, USA
pp. 141-152

Rebound: Scalable checkpointing for coherent shared memory (Abstract)

R. Agarwal , Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
P. Garg , Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
J. Torrellas , Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
pp. 153-164

Demand-driven software race detection using hardware performance counters (Abstract)

J. L. Greathouse , Univ. of Michigan, Ann Arbor, MI, USA
Zhiqiang Ma , Intel Corp., Hillsboro, OR, USA
M. I. Frank , Intel Corp., Hillsboro, OR, USA
R. Peri , Intel Corp., Hillsboro, OR, USA
T. Austin , Univ. of Michigan, Ann Arbor, MI, USA
pp. 165-176

i-NVMM: A secure non-volatile main memory system with incremental encryption (Abstract)

Siddhartha Chhabra , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Y. Solihin , Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
pp. 177-188

Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security (Abstract)

M. Tiwari , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
J. K. Oberg , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
X. Li , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
J. Valamehr , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
T. Levin , Naval Postgrad. Sch., Monterey, CA, USA
B. Hardekopf , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
R. Kastner , Dept. of Comput. Sci. & Eng., Univ. of California, San Diego, La Jolla, CA, USA
F. T. Chong , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
T. Sherwood , Dept. of Comput. Sci., Univ. of California, Santa Barbara, CA, USA
pp. 189-199

Sampling + DMR: Practical and low-overhead permanent fault detection (Abstract)

S. Nomura , Vertical Res. Group, Univ. of Wisconsin - Madison, Madison, WI, USA
M. D. Sinclair , Vertical Res. Group, Univ. of Wisconsin - Madison, Madison, WI, USA
Chen-Han Ho , Vertical Res. Group, Univ. of Wisconsin - Madison, Madison, WI, USA
V. Govindaraju , Vertical Res. Group, Univ. of Wisconsin - Madison, Madison, WI, USA
M. de Kruijf , Vertical Res. Group, Univ. of Wisconsin - Madison, Madison, WI, USA
K. Sankaralingam , Vertical Res. Group, Univ. of Wisconsin - Madison, Madison, WI, USA
pp. 201-212

Releasing efficient beta cores to market early (Abstract)

S. Sudhakrishnan , Dept. of Comput. Eng., Univ. of California Santa Cruz, Santa Cruz, CA, USA
R. Dicochea , Dept. of Comput. Eng., Univ. of California Santa Cruz, Santa Cruz, CA, USA
J. Renau , Dept. of Comput. Eng., Univ. of California Santa Cruz, Santa Cruz, CA, USA
pp. 213-221

CPPC: Correctable parity protected cache (Abstract)

M. Manoochehri , Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
M. Annavaram , Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
M. Dubois , Ming Hsieh Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
pp. 223-234

Energy-efficient mechanisms for managing thread context in throughput processors (Abstract)

Mark Gebhart , Univ. of Texas at Austin, Austin, TX, USA
D. R. Johnson , Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
D. Tarjan , NVIDIA, Santa Clara, CA, USA
S. W. Keckler , Univ. of Texas at Austin, Austin, TX, USA
W. J. Dally , NVIDIA, Santa Clara, CA, USA
E. Lindholm , NVIDIA, Santa Clara, CA, USA
K. Skadron , Univ. of Virginia, Charlottesville, VA, USA
pp. 235-246
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