The Community for Technology Leaders
Parallel Processing Symposium, International (1998)
Orlando, Florida
Mar. 30, 1998 to Apr. 3, 1998
ISBN: 0-8186-8403-8
TABLE OF CONTENTS

Caching-efficient multithreaded fast multiplication of sparse matrices (PDF)

P.D. Sulatycke , Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
pp. 117-123

Conference Committee (Abstract)

pp. XX
Keynote Address
Session 1: Communication
Session 2: Compilers I
Session 3: Mathematical Applications
Session 4: Networks
Session 5: Compilers II
Session 5: Compilers II
Session 6: Signal and Image Processing
Session 6: Signal and Image Processing
Session 7: Collective Communication
Session 8: Memory Hierarchy and I/O
Session 8: Memory Hierarchy and I/O
Session 9: Algorithms I
Keynote Address
Session 10: Routing
Session 10: Routing
Session 11: Operating Systems and Scheduling
Session 12: Algorithms II

Improved concurrency control techniques for multi-dimensional index structures (PDF)

K.V. Ravi Kanth , Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
pp. 580-586
Session 12: Algorithms II
Session 13: Multiprocessor Performance Evaluation
Session 14: Scheduling
Session 15: Databases and Sorting

Optimistic synchronization of mixed-mode simulators (PDF)

P. Frey , Dept. of Electr. Comput. & Eng. Comput. Sci., Cincinnati, OH, USA
pp. 694-699
Session 15: Databases and Sorting
Data Intensive vs. Scientific Computing: Will the Twain Meet for Parallel Processing?

Panel Abstract (Abstract)

pp. XXv
Environments, Tools, and Evaluation Methods
Reconfigurable Systems
Keynote Address
Session 16: Performance Prediction and Evaluation
Session 17: Software Distributed Shared Memory
Session 18: Scientific Simulation
Session 19: Fault Tolerance
Session 20: Performance and Debugging Tools
Session 21: Distributed Systems

Index of Authors (Abstract)

pp. 0807
98 ms
(Ver 3.3 (11022016))