The Community for Technology Leaders
Parallel Processing Symposium, International (1991)
Anaheim, CA, USA
Apr. 30, 1991 to May 2, 1991
ISBN: 0-8186-9167-0
TABLE OF CONTENTS
Papers

Efficient implementations of a class of +or-2/sup b/ parallel computations on a SIMD hypercube (Abstract)

Nassimi , CIS Dept., New Jersey Inst. of Technol., Newark, NJ, USA
pp. 2-9

Triangulation in a plane and 3D convex hull on mesh-connected arrays and hypercubes (Abstract)

Holey , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
pp. 10-17

The effects of communication latency upon synchronization and dynamic load balance on a hypercube (Abstract)

Marinescu , Dept of Comput. Sci., Purdue Univ., West Lafayette, IN, USA
Rice , Dept of Comput. Sci., Purdue Univ., West Lafayette, IN, USA
pp. 18-25

Improved graph computations on the reconfigurable mesh (Abstract)

Reisis , Dept. of Electr. Eng., Nat. Tech. Univ. of Athens, Greece
pp. 26-29

Design guidelines for parallel algorithms using continuous job profiles (Abstract)

Gonzalez , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Wilson , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
pp. 30-36

An inherently fault tolerant sorting algorithm (Abstract)

Yen , Dept. of Comput. Sci., Houston Univ., TX, USA
Bastani , Dept. of Comput. Sci., Houston Univ., TX, USA
Leiss , Dept. of Comput. Sci., Houston Univ., TX, USA
pp. 37-42

Performance analysis of algorithms on a message passing multiprocess (Abstract)

Basu , Centre for Dev. of Adv. Comput., Bangalore, India
Srinivas , Centre for Dev. of Adv. Comput., Bangalore, India
Paulraj , Centre for Dev. of Adv. Comput., Bangalore, India
Kumar , Centre for Dev. of Adv. Comput., Bangalore, India
pp. 43-50

Routing algorithms in interval and circular-arc networks (Abstract)

Sridhar , Dept. of Comput. Sci., South Carolina Univ., Columbia, SC, USA
Goyal , Dept. of Comput. Sci., South Carolina Univ., Columbia, SC, USA
pp. 51-55

Deterministic timing schema for parallel programs (Abstract)

Shaw , Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
pp. 56-63

Generalized formulation and hypercube algorithms for relaxation labeling (Abstract)

Leung , Dept. of Comput. Sci., Keyano Coll., Fort McMurray, Alta., Canada
pp. 64-69

General asynchrony is not expensive for PRAMs (Abstract)

Becker , Div. of Comput Sci., California Univ., Davis, CA, USA
Park , Div. of Comput Sci., California Univ., Davis, CA, USA
Martel , Div. of Comput Sci., California Univ., Davis, CA, USA
pp. 70-75

Fast parallel algorithms for solving triangular systems of linear equations on the hypercube (Abstract)

Ibarra , Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
Kim , Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA
pp. 76-83

An algorithm for generating node disjoint routes in Kautz digraphs (Abstract)

Havinga , Dept. of Comput. Sci., Twente Univ., Enschede, Netherlands
Jansen , Dept. of Comput. Sci., Twente Univ., Enschede, Netherlands
Smit , Dept. of Comput. Sci., Twente Univ., Enschede, Netherlands
pp. 102-107

A neural-type parallel algorithm for fast matrix inversion (Abstract)

Ioannou , Dept. of Electr. Syst., Univ. of Southern California, Los Angeles, CA, USA
Polycarpou , Dept. of Electr. Syst., Univ. of Southern California, Los Angeles, CA, USA
pp. 108-113

Parallel multiple search (Abstract)

Zhaofang Wen , Dept. of Comput Sci., Old Dominion Univ., Norfolk, VA, USA
pp. 114-119

SIMD data communication algorithms for multiply twisted hypercubes (Abstract)

Si-Qing Zheng , Dept. of Comput. Sci., Louisiana State Univ., Baton Rouge, LA, USA
pp. 120-125

Two EREW algorithms for parentheses matching (Abstract)

Prasad , Dept. of Math. & Comput. Sci., Georgia State Univ., Atlanta, GA, USA
pp. 126-131

A cost-optimal parallel algorithm for the parentheses matching problem on an EREW PRAM (Abstract)

Das , Dept. of Comput. Sci., North Texas Univ., Denton, TX, USA
Chen , Dept. of Comput. Sci., North Texas Univ., Denton, TX, USA
pp. 132-137

A parallel approximation algorithm for solving one-dimensional bin packing problems (Abstract)

Wang , Dept. of Comput. Sci., George Mason Univ., Fairfax, VA, USA
Berkey , Dept. of Comput. Sci., George Mason Univ., Fairfax, VA, USA
pp. 138-143

Fully normal algorithms for incomplete hypercubes (Abstract)

Prabhala , Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
Sherwani , Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
pp. 144-150

Refining algorithm mappings for linear systolic arrays (Abstract)

Varadarajan , Florida Univ., Gainesville, FL, USA
Ravichandran , Florida Univ., Gainesville, FL, USA
pp. 151-154

Analysis of parallel mixed-mode simulation algorithms (Abstract)

Chamberlain , Comput. & Commun. Res. Center, Washington Univ., St. Louis, MO, USA
Franklin , Comput. & Commun. Res. Center, Washington Univ., St. Louis, MO, USA
pp. 155-160

Implementation of an oversize neural network on DAP-510 (Abstract)

Gupta , Dept. of Comput. Sci., Old Dominion Univ., Norfolk, VA, USA
Grosch , Dept. of Comput. Sci., Old Dominion Univ., Norfolk, VA, USA
Zubair , Dept. of Comput. Sci., Old Dominion Univ., Norfolk, VA, USA
pp. 161-164

Performance of parallel spanning tree algorithms on linear arrays of transputers and Unix systems (Abstract)

Das , Dept. of Comput. Sci., North Texas Univ., Denton, TX, USA
Cui-Qing Yang , Dept. of Comput. Sci., North Texas Univ., Denton, TX, USA
pp. 165-168

Trade-offs in mapping FFT computations onto fixed size mesh processor array (Abstract)

Ju Wook Jang , Univ. of Southern California, Los Angeles, CA, USA
pp. 170-177

Parallel vision integration on the AMT distributed array processor (Abstract)

Toborg , Hughes Res. Labs., Malibu, CA, USA
pp. 178-185

Functional characterization of sensor integration in distributed sensor networks (Abstract)

Prasad , Dept. of Comput. Sci., Louisiana State Univ., Baton Rouge, LA, USA
Iyengar , Dept. of Comput. Sci., Louisiana State Univ., Baton Rouge, LA, USA
pp. 186-193

Connected components with split and merge (Abstract)

Kistler , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
Webb , Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
pp. 194-201

Optical content addressable memories for data/knowledge base processing (Abstract)

Akyokus , Syracuse Univ., New York, NY, USA
Berra , Syracuse Univ., New York, NY, USA
pp. 202-207

Parallel implementation of image understanding tasks on gated-connection networks (Abstract)

Shu , Hughes Res. Labs., Malibu, CA, USA
Nash , Hughes Res. Labs., Malibu, CA, USA
pp. 216-223

Special features of a VLIW architecture (Abstract)

Abnous , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Bagherzadeh , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
pp. 224-227

A neural algorithm for variable thresholding of images (Abstract)

Zhen-Ping Lo , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Bavarian , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
pp. 228-233

Design of an optical content-addressable parallel processor with applications to fast searching and information retrieval (Abstract)

Louri , Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
pp. 234-239

A parallel processing approach to incremental conceptual clustering (Abstract)

Wohl , Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA
Christopher , Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA
pp. 240-245

Analysis of neighborhood interaction in Kohonen neural networks (Abstract)

Zhen-Ping Lo , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Bavarian , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Fujita , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
pp. 246-249

On a binary relation inference network (Abstract)

Su , Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada
Lam , Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada
pp. 250-255

MCMR: a multiple rule firing production system model (Abstract)

Moldovan , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
Seungho Cha , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
Kuo , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
pp. 256-259

Guided scheduling schemes for image understanding tasks for shared and distributed memory multiprocessors (Abstract)

Choudhary , Dept. of Electr. & Comput. Eng., Syracuse Univ., New York, NY, USA
Ponnusamy , Dept. of Electr. & Comput. Eng., Syracuse Univ., New York, NY, USA
pp. 260-264

Optical database machine using spatial light rebroadcasters (Abstract)

Soon Myoung Chung , Dept. of Comput. Sci. & Eng., Wright State Univ., Dayton, OH, USA
pp. 265-268

Design of a clustered multiprocessor for real-time natural language understanding (Abstract)

Moldovan , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
DeMara , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
pp. 270-277

Prototype implementation of a highly parallel dataflow machine EM-4 (Abstract)

Kodama , Electrotech. Lab., Ibaraki, Japan
Yamaguchi , Electrotech. Lab., Ibaraki, Japan
Sakai , Electrotech. Lab., Ibaraki, Japan
pp. 278-286

Proteus system architecture and organization (Abstract)

Haralick , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Jenq-Neng Hwang , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Chung-Ho Chen , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Shapiro , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Cooper , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Johnson , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Somani , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Wittenbrink , Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
pp. 287-294

Development of a mixed MIMD-SIMD architecture using the AMT DAP (Abstract)

Skinner , Active Memory Technol., Reading, UK
Bale , Active Memory Technol., Reading, UK
Flanders , Active Memory Technol., Reading, UK
pp. 295-300

Instruction execution trade-offs for SIMD vs. MIMD vs. mixed mode parallelism (Abstract)

Berg , Sequent Comput. Syst. Inc., Beaverton, OR, USA
pp. 301-308

An effective synchronization network for large multiprocessor systems (Abstract)

Tsun-yuk Hsu , Center for Supercomput. Res. & Dev., Urbana, IL, USA
Pen-Chung Yew , Center for Supercomput. Res. & Dev., Urbana, IL, USA
pp. 309-317

Input/output operations for hybrid data-flow/control-flow systems (Abstract)

Evripidou , Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA
pp. 318-323

A linked list cache coherence protocol: verifying the bottom layer (Abstract)

Krogdahl , Dept. of Inf., Oslo Univ., Norway
Gjessing , Dept. of Inf., Oslo Univ., Norway
Munthe-Kaas , Dept. of Inf., Oslo Univ., Norway
pp. 324-329

An approach to solve the cache thrashing problem (Abstract)

Zhixi Fang , Convex Comput. Corp., Richardson, TX, USA
pp. 330-335

Parallel multi-context architecture with high-speed synchronization mechanism (Abstract)

Uchibori , Electrotech. Lab., Ibaraki, Japan
Toda , Electrotech. Lab., Ibaraki, Japan
Shimada , Electrotech. Lab., Ibaraki, Japan
Nishida , Electrotech. Lab., Ibaraki, Japan
Sakai , Electrotech. Lab., Ibaraki, Japan
pp. 336-343

Systolic rank updating and the solution of non-linear equations (Abstract)

Megson , Comput. Lab., Newcastle upon Tyne Univ., UK
pp. 344-351

On the design of optimal fault-tolerant systolic array architectures (Abstract)

Esonu , Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
Al-Khalili , Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
pp. 352-357

From algorithms to parallel architectures: a formal approach (Abstract)

Elleithy , Dept. of Comput. Eng., King Fahd Univ., Dhahran, Saudi Arabia
pp. 358-363

Bounds on performance of VLSI processor arrays (Abstract)

Nayak , Center for Parallel & Distributed Comput., Carleton Univ., Ottawa, Ont., Canada
Santoro , Center for Parallel & Distributed Comput., Carleton Univ., Ottawa, Ont., Canada
pp. 364-370

Systolic array architecture for adaptive eigenstructure decomposition of correlation matrices (Abstract)

Erlich , California Univ., Los Angeles, CA, USA
Yao , California Univ., Los Angeles, CA, USA
pp. 371-376

State variable model for a class of multiprocessor systems (Abstract)

Chaudhry , Dept. of Electr. & Comput. Eng., Missouri Univ., Columbia, MO, USA
pp. 377-380

Parallel I/O subsystems for distributed-memory multicomputers (Abstract)

Agarwal , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Ghosh , Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
pp. 381-384

Armstrong II: a loosely coupled multiprocessor with a reconfigurable communications architecture (Abstract)

Silverman , Div. of Eng., Brown Univ., Providence, RI, USA
Athanas , Div. of Eng., Brown Univ., Providence, RI, USA
pp. 385-388

Multidimensional access shared memory parallel processing systems (Abstract)

Scherson , Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
pp. 390-397

A simple algorithm to route arbitrary permutations on 8-input 5-stage shuffle/exchange network (Abstract)

Raghavendra , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
Kim , Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
pp. 398-403

Characterization of node disjoint (parallel) path in star graphs (Abstract)

Dhall , Parallel Process. Inst., Oklahoma Univ., Norman, OK, USA
Lakshmivarahan , Parallel Process. Inst., Oklahoma Univ., Norman, OK, USA
Jung-Sing Jwo , Parallel Process. Inst., Oklahoma Univ., Norman, OK, USA
pp. 404-409

Efficient randomized routing on Clos networks (Abstract)

Youssef , George Washington Univ., Washington, DC, USA
pp. 410-415

On optimal embeddings into incomplete hypercubes (Abstract)

Gupta , Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
Sherwani , Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
Boals , Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
pp. 416-423

Distributed hierarchical optimal routing using aggregation/disaggregation and decomposition/composition techniques (Abstract)

Tsai , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Sung-Woo Park , Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
pp. 424-431

A note on orthogonal graphs (Abstract)

Dhall , Parallel Process. Inst., Oklahoma Univ., Norman, OK, USA
Madabhushi , Parallel Process. Inst., Oklahoma Univ., Norman, OK, USA
Lakshmivarahan , Parallel Process. Inst., Oklahoma Univ., Norman, OK, USA
pp. 432-437

Choosing the interconnect of distributed memory systems by cost and blocking behavior (Abstract)

Montenegro , GMD Res. Center for Innovative Comput. Syst. & Technol., Berlin, Germany
Giloi , GMD Res. Center for Innovative Comput. Syst. & Technol., Berlin, Germany
pp. 438-444

Optimum embeddings of end-around meshes into pyramid networks (Abstract)

Dingle , Dept. of Comput. Sci. & Electr. Eng., Lehigh Univ., Bethlehem, PA, USA
Barada , Dept. of Comput. Sci. & Electr. Eng., Lehigh Univ., Bethlehem, PA, USA
pp. 445-451

Link augmented binary (LAB)-tree: its structure, routing, and fault tolerance properties (Abstract)

Mittal , Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Madras, India
pp. 452-457

Congestion and fault tolerance of binary tree embeddings on hypercube (Abstract)

Ramaiyer , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
Efe , Center for Adv. Comput. Studies, Southwestern Louisiana Univ., Lafayette, LA, USA
pp. 458-463

Packed exponential connections-a hierarchy of 2-D meshes (Abstract)

Kirkman , Mitre Corp., McLean, VA, USA
pp. 464-470

Cross-cube: a new fault tolerant hypercube-based network (Abstract)

Haq , Landis & Gyr Syst. Inc., San Jose, CA, USA
pp. 471-474

Multi-level hypercube network (Abstract)

Aboelaze , Dept. of Comput. Sci., York Univ., North York, Ont., Canada
pp. 475-480

A resilient decentralized commit protocol (Abstract)

Shyan-Ming Yuan , Dept. of Comput. & Inf. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan
pp. 481-486

Greedy partitioning strategy for banyan-hypercube networks (Abstract)

Youssef , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
Bellaachia , Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA
pp. 487-490

High-performance parallel pipelined voting networks (Abstract)

Parhami , Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
pp. 491-494

Modeling and performance analysis for processor-to-processor communications unit using a 100 Mb/s optical token ring (Abstract)

Uozumi , NTT Commun. & Inf. Process. Labs., Kanagawa, Japan
Oyaizu , NTT Commun. & Inf. Process. Labs., Kanagawa, Japan
Kimura , NTT Commun. & Inf. Process. Labs., Kanagawa, Japan
Matsunaga , NTT Commun. & Inf. Process. Labs., Kanagawa, Japan
Hoshiko , NTT Commun. & Inf. Process. Labs., Kanagawa, Japan
pp. 495-498

A scheduling algorithm for parallelizable dependent tasks (Abstract)

Banerjee , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
Belkhale , Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
pp. 500-506

Scheduling and optimization for multiprocessor systems (Abstract)

Chiun-Chieh Hsu , Dept. of Inf. Manage., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
pp. 507-512

A message segmentation technique to minimize task completion time (Abstract)

Mauney , North Carolina State Univ., Raleigh, NC, USA
Pande , North Carolina State Univ., Raleigh, NC, USA
Kim , North Carolina State Univ., Raleigh, NC, USA
Agrawal , North Carolina State Univ., Raleigh, NC, USA
pp. 519-524

Load balancing on a hypercube (Abstract)

Jinwoon Woo , Dankook Univ., Seoul, South Korea
pp. 525-530

Scheduling parallelizable imprecise computations on multiprocessors (Abstract)

Lin , Dept. of Comput. Sci., Illinois Univ., Urbana-Champaign, IL, USA
Yu , Dept. of Comput. Sci., Illinois Univ., Urbana-Champaign, IL, USA
pp. 531-536

Improved algorithms for load balancing in circuit-switched hypercubes (Abstract)

Chalasani , Univ. of Southern California, Los Angeles, CA, USA
Boppana , Univ. of Southern California, Los Angeles, CA, USA
Raghavendra , Univ. of Southern California, Los Angeles, CA, USA
pp. 537-542

Implementation of a parallel Prolog interpreter on multiprocessors (Abstract)

Kale , Illinois Univ., Urbana, IL, USA
Ramkumar , Illinois Univ., Urbana, IL, USA
pp. 543-548

Design and evaluation of a high performance file system for message passing parallel computers (Abstract)

Shukla , Centre for Dev. of Adv. Comput., Bangalore, India
Paulraj , Centre for Dev. of Adv. Comput., Bangalore, India
Nagaraj , Centre for Dev. of Adv. Comput., Bangalore, India
pp. 549-554

Data prefetching strategies for vector cache memories (Abstract)

Patel , Center for Reliable & High-Performance Comput., Illinois Univ., Urbana-Champaign, IL, USA
Fu , Center for Reliable & High-Performance Comput., Illinois Univ., Urbana-Champaign, IL, USA
pp. 555-560

Use of PARADISE: a meta-tool for visualizing parallel systems (Abstract)

Casavant , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Kohl , Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
pp. 561-567

Chief: a parallel simulation environment for parallel systems (Abstract)

Veidenbaum , Center for Supercomput. Res. & Dev., Illinois Univ., Urbana-Champaign, IL, USA
Pen-Chung Yew , Center for Supercomput. Res. & Dev., Illinois Univ., Urbana-Champaign, IL, USA
Bruner , Center for Supercomput. Res. & Dev., Illinois Univ., Urbana-Champaign, IL, USA
Hoichi Cheong , Center for Supercomput. Res. & Dev., Illinois Univ., Urbana-Champaign, IL, USA
pp. 568-575

Confining imperative languages for parallel processing (Abstract)

Kechang Dai , GMD Res. Center for Innovative Comput. Syst. & Technol., Berlin, Germany
Giloi , GMD Res. Center for Innovative Comput. Syst. & Technol., Berlin, Germany
pp. 576-581

A geometrical coding to compile affine recurrence equations on regular arrays (Abstract)

Mongenet , Dept. d'Inf., Univ. Louis Pasteur, Strasbourg, France
pp. 582-590

A load sharing interconnection network for hard real-time systems (Abstract)

Avritzer , AT&T Bell Labs., Middletown, NJ, USA
pp. 591-598

Loop partitioning unimodular transformations for distributed memory multiprocessors (Abstract)

Kumar , Center for Dev. of Adv. Comput., Bangalore, India
Kulkarni , Center for Dev. of Adv. Comput., Bangalore, India
Basu , Center for Dev. of Adv. Comput., Bangalore, India
Paulraj , Center for Dev. of Adv. Comput., Bangalore, India
pp. 599-604

Execution of regular DO loops on asynchronous multiprocessors (Abstract)

Pei Ouyang , Dept. of Comput. Sci., Courant Inst. of Math. Sci., New York Univ., NY, USA
pp. 605-610

Process migration in the GALAXY distributed operating system (Abstract)

Xiaohua Jia , Dept. of Inf. Sci., Tokyo Univ., Japan
Maekawa , Dept. of Inf. Sci., Tokyo Univ., Japan
Kyu Sung Park , Dept. of Inf. Sci., Tokyo Univ., Japan
Sinha , Dept. of Inf. Sci., Tokyo Univ., Japan
Shimizu , Dept. of Inf. Sci., Tokyo Univ., Japan
pp. 611-618

An analysis of recurrence relations in Fortran Do-loops for vector processing (Abstract)

Carver , Dept. of Comput. Sci., Louisiana State Univ., Baton Rouge, LA, USA
Chih-Ping Chu , Dept. of Comput. Sci., Louisiana State Univ., Baton Rouge, LA, USA
pp. 619-625

Parallelizing tightly nested loops (Abstract)

Nicolau , Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
Ki-Chang Kim , Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
pp. 630-633

A simulation of demand-driven dataflow: translation from Lucid into MDC language (Abstract)

Thiruvathukal , Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA
Christopher , Dept. of Comput. Sci., Illinois Inst. of Technol., Chicago, IL, USA
pp. 634-637

PMAC: an environment for parallel programming (Abstract)

Laurent , Bull. Corp. Res. Center, Louveciennes, France
Dehbonei , Bull. Corp. Res. Center, Louveciennes, France
Tawbi , Bull. Corp. Res. Center, Louveciennes, France
pp. 638-641

An OR-parallel and restricted AND-parallel nonbacktracking Prolog execution model (Abstract)

Aybay , Dept. of Electr. & Electron. Eng., Middle East Tech. Univ., Ankara, Turkey
pp. 642-645
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