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2014 IEEE International Parallel & Distributed Processing Symposium Workshops (IPDPSW) (2014)
Phoenix, AZ, USA
May 19, 2014 to May 23, 2014
ISBN: 978-1-4799-4117-9
TABLE OF CONTENTS

Cover Art (PDF)

pp. C4

Title Page i (PDF)

pp. i

Title Page iii (PDF)

pp. iii

Copyright Page (PDF)

pp. iv

Table of Contents (PDF)

pp. v-xxii

A Low-Latency Algorithm and FPGA Design for the Min-Search of LDPC Decoders (Abstract)

Georgios Tzimpragos , Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece
Christoforos Kachris , Athens Inf. Technol., Athens, Greece
Dimitrios Soudris , Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece
Ioannis Tomkos , Athens Inf. Technol., Athens, Greece
pp. 269-274

DPDNS Keynote (Abstract)

pp. 1296

Author Index (PDF)

pp. 1750-1757
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