The Community for Technology Leaders
2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (2013)
Cambridge, MA, USA USA
May 20, 2013 to May 24, 2013
pp: 1186-1193
ABSTRACT
Emerging heterogeneous architectures do not necessarily provide cache-coherent shared memory across all components of the system. Although there are good reasons for this architectural decision, it does provide programmers with a challenge. Several programming models and approaches are currently available, including explicit data movement for offloading computation to coprocessors, and treating coprocessors as distributed memory machines by using message passing. This paper examines the potential of distributed shared memory (DSM) for addressing this programming challenge. We discuss how our recently proposed DSM system and its memory consistency model maps to the heterogeneous node context, and present experimental results that highlight the advantages and challenges of this approach.
INDEX TERMS
multicore systems, virtual shared memory, cache coherence, memory consistency models
CITATION

B. Ramesh, C. J. Ribbens and S. Varadarajan, "Towards Virtual Shared Memory for Non-cache-coherent Multicore Systems," 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum(IPDPSW), Cambridge, MA, USA USA, 2013, pp. 1186-1193.
doi:10.1109/IPDPSW.2013.73
187 ms
(Ver 3.3 (11022016))