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2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (2011)
Anchorage, Alaska USA
May 16, 2011 to May 20, 2011
ISSN: 1530-2075
ISBN: 978-0-7695-4577-6
pp: 290-293
ABSTRACT
This paper considers the possibility of speeding up the configuration by reducing the size of configware in coarse grained reconfigurable architectures (CGRAs). Our goal was to reduce the number of cycles and increase the configuration bandwidth. The proposed technique relies on multicasting and bit stream compression. The multicasting reduces the cycles by configuring the components performing identical functions simultaneously, in a single cycle, while the bit stream compression increases the configuration bandwidth. We have chosen the dynamically reconfigurable resource array (DRRA) architecture as a vehicle to study the efficiency of this approach. In our proposed method, the configuration bit stream is compressed offline and stored in a memory. If reconfiguration is required, the compressed bit stream is decompressed using an online decompresser and sent to DRRA. Simulation results using practical applications showed up to 78% and 22% decrease in configuration cycles for completely parallel and completely serial implementations, respectively. Synthesis results have confirmed nigligible overhead in terms of area (1.2 %) and timing.
INDEX TERMS
CITATION
Juha Plosila, Syed. M.A.H. Jafri, Ahmed Hemani, Kolin Paul, Hannu Tenhunen, "Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures", 2013 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum, vol. 00, no. , pp. 290-293, 2011, doi:10.1109/IPDPS.2011.166
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