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2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW) (2010)
Atlanta, GA, USA
Apr. 19, 2010 to Apr. 23, 2010
ISBN: 978-1-4244-6533-0
pp: 1-4
Abhinav Sarje , Department of Electrical and Computer Engineering, Iowa State University, Ames, USA
Srinivas Aluru , Department of Electrical and Computer Engineering, Iowa State University, Ames, USA
ABSTRACT
Today's emerging architectures have higher levels of parallelism incorporated within a processor. They require efficient strategies to extract the performance they have to offer. In our work, we develop architecture-aware parallel strategies to perform various kinds of pairwise computations - pairwise genomic alignments, and scheduling large number of general pairwise computations with applications to computational systems biology and materials science. We present our schemes in the context of the IBM Cell BE, an example of a heterogeneous multicore, but are nevertheless applicable to any similar architecture, as well as general multicores with our strategies being cache-aware.
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CITATION

A. Sarje and S. Aluru, "Parallel applications employing pairwise computations on emerging architectures," 2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), Atlanta, GA, USA, 2010, pp. 1-4.
doi:10.1109/IPDPSW.2010.5470805
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