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2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS) (2018)
Vancouver, British Columbia, Canada
May 21, 2018 to May 25, 2018
ISSN: 1530-2075
ISBN: 978-1-5386-4368-6
pp: 126-136
ABSTRACT
Data versioning and renaming is a technique to enforce true dependencies and eliminate false dependencies in concurrent out-of-order execution. By extending the addressing to memory to support both a location and a version number, the memory system can match loads with the appropriate stores. With multiple versions of data for a single memory location, Write-after-Read and Write-after-Write dependencies are avoided. In this paper, we present architectural support for O-structures, which provide memory versioning and renaming. We describe a microarchitectural implementation of an O-structure in the cache hierarchy of a multicore processor and demonstrate the need of each feature provided by O-structures. Our evaluation shows that O-structures can be effective in supporting a range of parallel workloads, including irregular, pointer-heavy code.
INDEX TERMS
cache storage, concurrency (computers), multiprocessing systems, parallel processing
CITATION

E. Gilad, T. Mayzels, E. Raab, M. Oskin and Y. Etsion, "Architectural Support for Unlimited Memory Versioning and Renaming," 2018 IEEE International Parallel and Distributed Processing Symposium (IPDPS), Vancouver, British Columbia, Canada, 2018, pp. 126-136.
doi:10.1109/IPDPS.2018.00023
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