The Community for Technology Leaders
RSS Icon
Subscribe
Cambridge, MA, USA USA
May 20, 2013 to May 24, 2013
ISBN: 978-1-4673-6066-1
pp: 126-137
ABSTRACT
Dense linear algebra has been traditionally used to evaluate the performance and efficiency of new architectures. This trend has continued for the past half decade with the advent of multi-core processors and hardware accelerators. In this paper we describe how several flavors of the Linpack benchmark are accelerated on Intel's recently released Intel(R) Xeon Phi(TM) co-processor (code-named Knights Corner) in both native and hybrid configurations. Our native DGEMM implementation takes full advantage of Knights Corner's salient architectural features and successfully utilizes close to 90% of its peak compute capability. Our native Linpack implementation running entirely on Knights Corner employs novel dynamic scheduling and achieves close to 80% efficiency - the highest published co-processor efficiency. Similarly to native, our single-node hybrid implementation of Linpack also achieves nearly 80% efficiency. Using dynamic scheduling and an enhanced look-ahead scheme, this implementation scales well to a 100-node cluster, on which it achieves over 76% efficiency while delivering the total performance of 107 TFLOPS.
INDEX TERMS
Kernel, Vectors, Tiles, Prefetching, Registers, Bandwidth, Matrix decomposition, Xeon Phi, HPL, SIMD, TLP, LU factorization, panel factorization, hybrid parallelization
CITATION
Alexander Heinecke, Karthikeyan Vaidyanathan, Mikhail Smelyanskiy, Alexander Kobotov, Roman Dubtsov, Greg Henry, Aniruddha G. Shet, George Chrysos, Pradeep Dubey, "Design and Implementation of the Linpack Benchmark for Single and Multi-node Systems Based on Intel® Xeon Phi Coprocessor", IPDPS, 2013, Parallel and Distributed Processing Symposium, International, Parallel and Distributed Processing Symposium, International 2013, pp. 126-137, doi:10.1109/IPDPS.2013.113
17 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool