Parallel and Distributed Processing Symposium, International (2008)
Miami, FL, USA
Apr. 14, 2008 to Apr. 18, 2008
Jurgen Teich , Department of Computer Science 12, University of Erlangen-Nuremberg, Am Weichselgarten 3, 91058, Germany
Josef Angermeier , Department of Computer Science 12, University of Erlangen-Nuremberg, Am Weichselgarten 3, 91058, Germany
When using dynamically and partially reconfigurable FPGAs in embedded systems, the scheduler needs to fulfill area and time requirements for each task. While those demands are already well studied in literature, another characteristic peculiarity of reconfigurable systems has been rather neglected: the reconfiguration overhead. However, scheduling algorithms considering the exclusive access to the reconfiguration port can improve the latency of obtained schedules considerably. In this paper, we present new scheduling heuristics and a methodology to compare approaches which take into consideration the reconfiguration overheads with those which disregard them. Furthermore, our experimental results give insight into possible performance increases and present problem instances for which the reconfiguration latency is negligible.
Jurgen Teich, Josef Angermeier, "Heuristics for scheduling reconfigurable devices with consideration of reconfiguration overheads", Parallel and Distributed Processing Symposium, International, vol. 00, no. , pp. 1-8, 2008, doi:10.1109/IPDPS.2008.4536540