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Parallel and Distributed Processing Symposium, International (2008)
Miami, FL, USA
Apr. 14, 2008 to Apr. 18, 2008
ISBN: 978-1-4244-1693-6
pp: 1-8
Peter Sobe , University of Lübeck, Institute of Computer Engineering, Denmark
Volker Hampel , University of Lübeck, Institute of Computer Engineering, Denmark
Erik Maehle , University of Lübeck, Institute of Computer Engineering, Denmark
ABSTRACT
A Hybrid Compute System (HCS) combines standard CPUs and reconfigurable devices, usually FPGAs, in one system. Recently, these systems have become more attractive again, due to a closer and hence faster coupling of both computational components. From our work with several designs for the same application, we have found the communication between a CPU and a FPGA-based coprocessor to relate either to pipelining or to a bulk-wise transfer with buffered data processing. We identify conditions which determine whether the pipelined or the buffered style should be used in a design. A Reed/Solomon encoding coprocessor has been implemented for each of the communication architectures to serve as an example of how these conditions materialize and how they influence the performance.
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CITATION
Peter Sobe, Volker Hampel, Erik Maehle, "Designing coprocessors for hybrid compute systems", Parallel and Distributed Processing Symposium, International, vol. 00, no. , pp. 1-8, 2008, doi:10.1109/IPDPS.2008.4536506
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