The Community for Technology Leaders
Parallel and Distributed Processing Symposium, International (2007)
Long Beach, CA, USA
Mar. 26, 2007 to Mar. 30, 2007
ISBN: 1-4244-0909-8
pp: 134
Thomas Sterling , Department of Computer Science, Center of Computation and Technology, Louisiana State University; Center for Advance Computation Research, California Institute of Technology; Computing and C
ABSTRACT
Heterogeneous system architecture has long been appreciated as a potential strategy for achieving super-linear speedup with respect to some normalizing parameter like number of nodes, cost, or power. However the challenge of programming and managing the system resources has been a limiting factor for the application of such systems on a broad scale. The exception has been the use of special purpose processors such as graphics processing units that may yield dramatic increases for such functionality enabling capabilities largely impossible otherwise like realistic high resolution real time interactive games. However, with power emerging as the dominant constraint on high performance computing and the need to make better use of logic and storage resources such components as the ClearSpeed SIMD attached processor and the IBM cell architectures among others is forcing mainstream computing to adopt heterogeneous processing. This keynote presentation will describe a computational model, ParalleX that provides an asynchronous runtime framework for supporting effective execution in an environment comprising heterogeneous elements. ParalleX is based on a messagedriven split-phase multithreaded transaction processing paradigm synthesizing a number of concepts represented in prior art that in ensemble will facilitate management of heterogeneous resources and provide the basis for a systematic programming methodology. Also discussed in this presentation is another example of a heterogeneous architecture, Gilgamesh II, that provides separate mechanisms for computations that exhibit disparate locality properties.
INDEX TERMS
null
CITATION

T. Sterling, "HCW Keynote Address ParalleX: An Asynchronous Execution Model for Scalable Heterogeneous Computing," 2007 IEEE International Parallel and Distributed Processing Symposium(IPDPS), Rome, 2007, pp. 134.
doi:10.1109/IPDPS.2007.370324
90 ms
(Ver 3.3 (11022016))