The Community for Technology Leaders
Parallel and Distributed Processing Symposium, International (2006)
Rhodes Island, Greece
Apr. 25, 2006 to Apr. 29, 2006
ISBN: 1-4244-0054-6
pp: 342
M. Alonso , Dept. of Comput. Eng., Univ. Politecnica de Valencia, Spain
ABSTRACT
Current trends in high-performance parallel computers show that fat-tree interconnection networks are one of the most popular topologies. The particular characteristics of this topology, that provide multiple alternative paths for each source/destination pair, make it an excellent candidate for applying power consumption reduction techniques. Such techniques are being increasingly applied in computer systems and the interconnection network is not an exception, since its contribution to the system power budget is not negligible. In this paper, we present a mechanism that dynamically switches on and off network links as a function of traffic. The mechanism is designed to guarantee network connectivity, according to the underlying routing algorithm. In this way, the default routing algorithm can be used regardless of the power saving actions taken, thus simplifying router design. Our simulation results show that significant network power consumption reductions can be obtained at no cost. Latency remains the same although the number of operating network links is dynamically adjusted.
INDEX TERMS
network power consumption reduction, dynamic power saving, fat-tree interconnection networks, on/off links, high-performance parallel computers, routing algorithm
CITATION
S. Coll, V. Santonja, J.M. Martinez, M. Alonso, P. Lopez, J. Duato, "Dynamic power saving in fat-tree interconnection networks using on/off links", Parallel and Distributed Processing Symposium, International, vol. 00, no. , pp. 342, 2006, doi:10.1109/IPDPS.2006.1639599
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