Parallel and Distributed Processing Symposium, International (2001)
San Francisco, California, USA
Apr. 23, 2001 to Apr. 27, 2001
The growing gap in performance between processor and memory speeds has created a problem for data-intensive applications. A recent approach for solving this problem is to use processor-in-memory (PIM) technology. PIM technology integrates a processor on a DRAM memory chip, which increases bandwidth between the processor and memory. In this paper, we discuss two PIM-based multiprocessor systems, the System Level Intelligent Intensive Computing (SLIIC) Quick Look (QL) board and a hypothetical V-IRAM multiprocessor board. The former system includes eight COTS PIM chips that are connected by a flexible FPGA-based interconnect network. The V-IRAM board modeled contains four Berkeley V-IRAM PIM processors (currently under development) that are connected using FPGAs. The performance of several data intensive applications on the SLIIC QL board is measured. The performance of the applications on the V-IRAM board is modeled at the clock
S. F. Shank, S. P. Crago, R. H. Chau, M. Zhu, J. Suh and C. Li, "Implementations of Real-time Data Intensive Applications on PIM-based Multiprocessor Systems*," Parallel and Distributed Processing Symposium, International(IPDPS), San Francisco, California, USA, 2001, pp. 30099a.