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11th IEEE International On-Line Testing Symposium (2003)
Kos Island, Greece
July 7, 2003 to July 9, 2003
ISBN: 0-7695-1968-7
TABLE OF CONTENTS

Program Committee (PDF)

pp. xiii

TTTC Information (PDF)

pp. 227
Welcome Message

null (PDF)

pp. null
Opening Session-Keynote Talks

null (PDF)

pp. null

null (PDF)

pp. null
Session 1: On-Line Testing Approaches

null (PDF)

pp. null

Separate Dual-Transistor Registers - A Circuit Solution for On-line Testing of Transient Error in UDSM-IC (Abstract)

Sujit Dey , University of California, San Diego
Yi Zhao , University of California, San Diego
pp. 7

A Sense Amplifier Based Circuit for Concurrent Detection of Soft and Timing Errors in CMOS ICs (Abstract)

A. Arapoyanni , University of Athens
Th. Haniotakis , Southern Illinois University
S. Matakias , University of Athens
Y. Tsiatouhas , University of Ioannina
pp. 12

On-Line Error Detecting Constant Delay Adder (Abstract)

Parag K. Lala , University of Arkansas
Whitney J. Townsend , The University of Texas at Austin
Jacob A. Abraham , The University of Texas at Austin
pp. 17
Session 2: Self Checking Circuits

null (PDF)

pp. null

A Modulo p Checked Self-Checking Carry Select Adder (Abstract)

V. Ocheretnij , University of Potsdam
D. Marienfeld , University of Potsdam
E. S. Sogomonyan , University of Potsdam
M. G?ssel , University of Potsdam
pp. 25

Foundation of Combined Datapath and Controller Self-checking Design (Abstract)

Mark Zwolinski , University of Southampton
Petros Oikonomakos , University of Southampton
pp. 30

Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits (Abstract)

Kartik Mohanramy , University of Texas at Austin
Michael G.osselz , University of Potsdam
Nur A. Toubay , University of Texas at Austin
Egor S. Sogomonyanz , University of Potsdam
pp. 35
Session 3: Checker Designs

null (PDF)

pp. null

Designing FPGA based Self-Testing Checkers for m-out-of-n Codes (Abstract)

V. Ostrovsky , Tel Aviv University, Israel
K. Nikitin , Tomsk State University, Russia
I. Levin , Tel Aviv University, Israel
A. Matrosova , Tomsk State University, Russia
pp. 49
Session 4: Fault Tolerance

null (PDF)

pp. null

Power Consumption of Fault Tolerant Codes: the Active Elements (Abstract)

A.K. Nieuwland , Philips Research Laboratories
V.E.S. van Dijk , Philips Research Laboratories
R.P. Kleihorst , Philips Research Laboratories
D. Rossi , University of Bologna
C. Metra , University of Bologna
pp. 61

On the Probability of Detecting Data Errors Generated by Permanent Faults Using Time Redundancy (Abstract)

Joakim Aidemark , Chalmers University of Technology
Johan Karlsson , Chalmers University of Technology
Peter Folkesson , Chalmers University of Technology
pp. 68

The positive effect on IC yield of embedded Fault Tolerance for SEUs (Abstract)

Andr? K. Nieuwland , Philips Research Laboratories
Richard P. Kleihorst , Philips Research Laboratories
pp. 75
Panel Session 1: How Can Defect-Based Test Be Made to Work in a Foundry World?

null (PDF)

pp. null
Session 5: Built In Self Test and Self Repair

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pp. null

On-Line Testable Decimation Filter Design for AMS Systems (Abstract)

S. Mir , TIMA Laboratory
M. A. Naal , TIMA Laboratory
E. Simeu , TIMA Laboratory
pp. 83

An Efficient BIST scheme for High-Speed Adders (Abstract)

C. Efstathiou , TEI of Athens
D. Nikolos , University of Partas; Computer Technology Institute
H. T. Vergos , University of Partas; Computer Technology Institute
D. G. Nikolos , University of Partas
pp. 89

Memory Built-In Self-Repair for Nanotechnologies (Abstract)

M. Nicolaidis , iRoC Technologies
N. Achouri , iRoC Technologies
L. Anghel , TIMA laboratory
pp. 94
Session 6: Analysis and Modelling of Transient and Delay Faults

null (PDF)

pp. null

An Improved Markov Source Design for Scan BIST (Abstract)

Wei Li , University of Iowa
Irith Pomeranz , Purdue University
Sudhakar M. Reddy , University of Iowa
Chaowen Yu , University of Iowa
pp. 106

A Model for Transient Fault Propagation in Combinatorial Logic (Abstract)

Cecilia Metra , University of Bologna
Daniele Rossi , University of Bologna
Martin Oma? , University of Bologna
Giacinto Papasso , University of Bologna
pp. 111
Session 7: Analysis and Verification of FPGA Faults

null (PDF)

pp. null

Analyzing SEU Effects in SRAM-based FPGAs (Abstract)

D. Bortolato , Universit? di Padova
M. Rebaudengo , Politecnico di Torino
M. Ceschia , Universit? di Padova; Istituto Nazionale di Fisica Nucleare
M. Sonza Reorda , Politecnico di Torino
P. Bernardi , Politecnico di Torino
M. Bellato , Istituto Nazionale di Fisica Nucleare
M. Violante , Politecnico di Torino
A. Paccagnella , Universit? di Padova; Istituto Nazionale di Fisica Nucleare
P. Zambolin , Universit? di Padova
A. Candelori , Istituto Nazionale di Fisica Nucleare
pp. 119

Defect Analysis for Delay-Fault BIST in FPGAs (Abstract)

O. H?ron , Universit? Montpellier II / CNRS
S. Pravossoudovitch , Universit? Montpellier II / CNRS
P. Girard , Universit? Montpellier II / CNRS
M. Renovell , Universit? Montpellier II / CNRS
pp. 124

A Fault Injection Tool for SRAM-based FPGAs (Abstract)

M. Alderighi , Istituto di Astrofisica Spaziale e Fisica Cosmica
M. Mancini , Istituto di Astrofisica Spaziale e Fisica Cosmica
S. D'Angelo , Istituto di Astrofisica Spaziale e Fisica Cosmica
G. R. Sechi , Istituto di Astrofisica Spaziale e Fisica Cosmica
pp. 129
Session 8: On-Line Testing of Microprocessor-Based Systems

null (PDF)

pp. null

Low-Cost On-Line Fault Detection Using Control Flow Assertions (Abstract)

Rajesh Venkatasubramanian , University of Michigan
John P. Hayes , University of Michigan
Brian T. Murray , Brighton Technical Center
pp. 137

A Watchdog Processor to Detect Data and Control Flow Errors (Abstract)

Paolo Prinetto , Politecnico di Torino
Alfredo Benso , Politecnico di Torino
Stefano Di Carlo , Politecnico di Torino
Giorgio Di Natale , Politecnico di Torino
pp. 144

Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores (Abstract)

G. Xenoulis , University of Piraeus, Greece
A. Paschalis , University of Athens, Greece
D. Gizopoulos , University of Piraeus, Greece
N. Kranitis , University of Athens, Greece
pp. 149
Session 9: Posters

null (PDF)

pp. null

On Compaction-Based Concurrent Error Detection (PDF)

Petros Drineas , Rensselaer Polytechnic Institute
Sobeeh Almukhaizim , Yale University
Yiorgos Makris , Yale University
pp. 157

Increasing Implementability of \beta-driven Threshold Checkers (PDF)

I. Levin , Tel Aviv University Israel
V. Ostrovsky , Tel Aviv University Israel
V. Varshavsky , NNT Israel
pp. 158

An RT-level Concurrent Error Detection Technique for Data Dominated Systems (PDF)

M. Violante , Politecnico di Torino
M. Sonza Reorda , Politecnico di Torino
O. Goloubeva , Politecnico di Torino
pp. 159

FAUST: FAUlt-injection Script-based Tool (PDF)

L. Tagliaferri , Politecnico di Torino
S. Di Carlo , Politecnico di Torino
P. Prinetto , Politecnico di Torino
G. Di Natale , Politecnico di Torino
I. Solcia , Politecnico di Torino
A. Benso , Politecnico di Torino
pp. 160

Fault Injection in Digital Logic Circuits at the VHDL Level (PDF)

S. R. Seward , University of Arkansas
P. K. Lala , University of Arkansas
pp. 161

Radiation test methodology for SRAM-based FPGAs by using THESIC+ (PDF)

F. Casini , Sanitas EG S.R.L.
M. Alderighi , Istituto di Astrofisica Spaziale e Fisica Cosmica, CNR
S. D'Angelo , Istituto di Astrofisica Spaziale e Fisica Cosmica, CNR
M. Mancini , Istituto di Astrofisica Spaziale e Fisica Cosmica, CNR
F. Faure , TIMA Laboratory
R. Velazco , TIMA Laboratory
G. R. Sechi , Istituto di Astrofisica Spaziale e Fisica Cosmica, CNR
S. Pastore , Sanitas EG S.R.L.
pp. 162

Introducing SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: Are They A Good Remedy? (PDF)

D. Prestes , Catholic University - PUCRS
D. Brum , Catholic University - PUCRS
M. Reorda , Politecnico di Torino
F. Vargas , Catholic University - PUCRS
E. Rhod , Catholic University - PUCRS
L. Bolzani , Catholic University - PUCRS
pp. 163

Analysis of Bit Transition Count for EDAC Encoded FSM (PDF)

T. L. Rajaprabhu , Sri Venkateswara College of Engineering, India
V. Balaji , Sri Venkateswara College of Engineering, India
N. Venkateswaran , WAran Research Foundation, India
V. Mahalingam , Sri Venkateswara College of Engineering, India
pp. 166

A Configurable Built in Current Sensor for Mixed Signal Circuit Testing (PDF)

Rodrigo Picos , Universitat Illes Balears
Joan Font , Universitat Illes Balears
Eugenio Garc? , Universitat Illes Balears
Miquel Roca , Universitat Illes Balears
Eugeni Isern , Universitat Illes Balears
pp. 167
Session 10: Merging On-Line and Off-Line Testing

null (PDF)

pp. null

Control Signal Protection For High Performance Processors (Abstract)

H. T. Vierhaus , Brandenburg TU Cottbus, Germany
M. Pflanz , IBM Deutschland Entwicklung GmbH, Germany
pp. 173

An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing (Abstract)

B. Alorda , Univ. de les Illes Balears
J. Segura , Univ. de les Illes Balears
pp. 178

Perspectives of Combining on-line and off-line Test Technology for Dependable Systems on a Chip (Abstract)

Heinrich Theodor Vierhaus , Brandenburg University of Technology Cottbus
Marcus Grabow , Brandenburg University of Technology Cottbus
Christian Galke , Brandenburg University of Technology Cottbus
pp. 183
Panel Session 2: When Will Soft Errors Become A Design Constraint?

null (PDF)

pp. null
Session 11: Industrial Application Cases

null (PDF)

pp. null

On a Redundant Diversified Steering Angle Sensor (Abstract)

Matthias Gulbins , Fraunhofer-Institut f?r Integrierte Schaltungen
Bernd Straube , Fraunhofer-Institut f?r Integrierte Schaltungen
Elmar Dilger , Robert Bosch GmbH
Thomas Ohnesorge , Fraunhofer-Institut f?r Integrierte Schaltungen
pp. 191

Error-Injection-Based Failure Characterization of the IEEE 1394 Bus (Abstract)

D. J. Beauregard , University of Illinois at Urbana-Champaign
L. Alkalai , National Aeronautics and Space Administration
R. K. Iyer , University of Illinois at Urbana-Champaign
Z. Kalbarczyk , University of Illinois at Urbana-Champaign
S. Chau , National Aeronautics and Space Administration
pp. 202
Session 12: Advanced Testing and Repair Issues

null (PDF)

pp. null

A Methodology for Test Replacement Solutions of Obsolete Processors (Abstract)

R. Velazco , TIMA Laboratory
L. Anghel , TIMA Laboratory
S. Saleh , TIMA Laboratory
pp. 209

Crosstalk Effect Minimization for Encoded Busses (Abstract)

C. Metra , D.E.I.S. University of Bologna
D. Rossi , D.E.I.S. University of Bologna
L. Di Silvio , D.E.I.S. University of Bologna
pp. 214

InTeRail: Using Existing and Extra Interconnects to Test Core-Based SOCs (Abstract)

Spyros Tragoudas , Southern Illinois University
Dimitri Kagaris , Southern Illinois University
pp. 219

Author's Index (PDF)

pp. 225
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