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2015 20th International Mixed-Signal Testing Workshop (IMSTW) (2015)
Paris, France
June 24, 2015 to June 26, 2015
ISBN: 978-1-4673-6732-5
TABLE OF CONTENTS

Cover page (PDF)

pp. 1

Using IJTAG digital islands in analogue circuits to perform trim and test functions (Abstract)

Hans Martin von Staudt , Dialog Semiconductor, Kirchheim/Teck, Germany
Alexios Spyronasios , Dialog Semiconductor, Kirchheim/Teck, Germany
pp. 1-5

Digitally-compatible ring oscillator frequency driven tuning of CN-TFT amplifiers: Performance compensation under statistical and morphological variations (Abstract)

Suvadeep Banerjee , Georgia Institute of Technology
Man Prakash Gupta , Georgia Institute of Technology
Aritra Banerjee , Texas Instruments
Satish Kumar , Georgia Institute of Technology
Abhijit Chatterjee , Georgia Institute of Technology
pp. 1-6

ACR BER correlation to ATE for a COFDM VHF RX (Abstract)

Peter Sarson , Full Service Foundry Test Development, ams AG, Unterpremstaetten, Austria
pp. 1-4

Considerations for light sources: For semiconductor light sensor test (Abstract)

Martin Buck , ams AG, Tamerton Road, Roborough, Plymouth, UK
pp. 1-6

Efficient contact screening of compact NVMs for high reliabilty automotive applications (Abstract)

Friedrich Peter Leisenberger , ams AG, Unterpremstaetten, Austria
Gregor Schatzberger , ams AG Unterpremstaetten, Austria
pp. 1-6

Buck converter modeling in SystemVerilog for verification and virtual test applications (Abstract)

Elvis Shera , Corporate Engineering, Dialog Semiconductor GmbH, Germany
Carsten Wegener , Corporate Engineering, Dialog Semiconductor GmbH, Germany
pp. 1-6

Structure preserving modeling for safety critical systems (Abstract)

Gurkan Uygur , Chair of Reliable Circuits and Systems, LZS, Friedrich-Alexander-University Erlangen-Nuremberg, Paul-Gordan-Str. 5, 91052 Erlangen, Germany
Sebastian M. Sattler , Chair of Reliable Circuits and Systems, LZS, Friedrich-Alexander-University Erlangen-Nuremberg, Paul-Gordan-Str. 5, 91052 Erlangen, Germany
pp. 1-6

An approach to generate test signals for analog circuits — A control-theoretic perspective (Abstract)

Wolfgang Vermeiren , Fraunhofer IIS/EAS Dresden, Germany
Fabian Hopsch , Fraunhofer IIS/EAS Dresden, Germany
Roland Jancke , Fraunhofer IIS/EAS Dresden, Germany
pp. 1-6

Modeling static analog behavior for determining mixed-signal test coverage using digital tools (Abstract)

Carsten Wegener , Corporate Engineering, Dialog Semiconductor GmbH, Germany
pp. 1-6

Reliability of SAR ADCs and associated embedded instrument detection (Abstract)

Jinbo Wan , Testable Design and Test of Integrated Systems (TDT) Group, University of Twente, Centre of Telecommunication and Information Technology (CTIT), Enschede, the Netherlands
Hans G. Kerkhoff , Testable Design and Test of Integrated Systems (TDT) Group, University of Twente, Centre of Telecommunication and Information Technology (CTIT), Enschede, the Netherlands
pp. 1-5

Determination of the aging offset voltage of AMR sensors based on accelerated degradation test (Abstract)

Andreina Zambrano , Testable Design Test of Integrated Systems (CTIT-TDT), University of Twente, Enschede, the Netherlands
Hans G. Kerkhoff , Testable Design Test of Integrated Systems (CTIT-TDT), University of Twente, Enschede, the Netherlands
pp. 1-5

Impact of stress acceleration on mixed-signal gate oxide lifetime (Abstract)

Kexin Yang , School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA USA
Linda Milor , School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA USA
pp. 1-6

A generic methodology for building efficient prediction models in the context of alternate testing (Abstract)

S. Larguech , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
F. Azais , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
S. Bernard , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
M. Comte , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
V. Kerzerho , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
M. Renovell , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
pp. 1-6

A fuzzy logic approach for highly dependable medical wearable systems (Abstract)

Cristina C. Oliveira , INESC TEC, Faculdade de Engenharia da Universidade do Porto, Porto, Portugal
Jose Machado da Silva , INESC TEC, Faculdade de Engenharia da Universidade do Porto, Porto, Portugal
pp. 1-5

Real-time adaptive test algorithm including test escape estimation method (Abstract)

Christian Streitwieser , Technology/Corporate Test Development, ams AG, Unterpremstaetten, Austria
pp. 1-6

Design of an on-chip stepwise ramp generator for ADC static BIST applications (Abstract)

Guillaume Renaud , Université Grenoble Alpes, TIMA, F-38000 Grenoble, France, CNRS, TIMA, F-38000 Grenoble, France
Manuel J. Barragan , Université Grenoble Alpes, TIMA, F-38000 Grenoble, France, CNRS, TIMA, F-38000 Grenoble, France
Salvador Mir , Université Grenoble Alpes, TIMA, F-38000 Grenoble, France, CNRS, TIMA, F-38000 Grenoble, France
pp. 1-6

Evaluation of harmonic cancellation techniques for sinusoidal signal generation in mixed-signal BIST (Abstract)

Hani Malloug , Université Grenoble Alpes, TIMA, F-38000, Grenoble, France, CNRS, TIMA, F-38000, Grenoble, France
Manuel J. Barragan , Université Grenoble Alpes, TIMA, F-38000, Grenoble, France, CNRS, TIMA, F-38000, Grenoble, France
Salvador Mir , Université Grenoble Alpes, TIMA, F-38000, Grenoble, France, CNRS, TIMA, F-38000, Grenoble, France
pp. 1-6

Oscillation-based approach applied to a low-power analog front-end for an implantable cardiac device (Abstract)

J. A. Miguel , Microelectronics Engineering Group, University of Cantabria, Av. de los Castros s/n, 39005, Santander, Spain
D. Rivas , Microelectronics Engineering Group, University of Cantabria, Av. de los Castros s/n, 39005, Santander, Spain
Y. Lechuga , Microelectronics Engineering Group, University of Cantabria, Av. de los Castros s/n, 39005, Santander, Spain
M. A. Allende , Microelectronics Engineering Group, University of Cantabria, Av. de los Castros s/n, 39005, Santander, Spain
M. Martinez , Microelectronics Engineering Group, University of Cantabria, Av. de los Castros s/n, 39005, Santander, Spain
pp. 1-6

A jitter injection signal generation and extraction system for embedded test of high-speed data I/O (Abstract)

Yan Li , Integrated Microsystems Laboratory, McGill University, Montreal, Canada
Steven Bielby , Integrated Microsystems Laboratory, McGill University, Montreal, Canada
Azhar Chowdhury , Integrated Microsystems Laboratory, McGill University, Montreal, Canada
Gordon W. Roberts , Integrated Microsystems Laboratory, McGill University, Montreal, Canada
pp. 1-6

Digital on-chip measurement circuit for built-in phase noise testing (Abstract)

S. David-Grignot , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
F. Azais , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
L. Latorre , LIRMM, CNRS/Univ. Montpellier, 161 rue Ada, 34095 Montpellier Cedex, France
F. Lefevre , NXP Semiconductors, 2 Esplanade Anton Phillips, 14000 Caen, France
pp. 1-6

Timing measurement BOST with multi-bit delta-sigma TDC (Abstract)

Takeshi Chujo , Division of Electronics and Informatics, Gunma University, Kiryu 376-8515 Japan
Daiki Hirabayashi , Division of Electronics and Informatics, Gunma University, Kiryu 376-8515 Japan
Takuya Arafune , Division of Electronics and Informatics, Gunma University, Kiryu 376-8515 Japan
Shohei Shibuya , Division of Electronics and Informatics, Gunma University, Kiryu 376-8515 Japan
Shu Sasaki , Division of Electronics and Informatics, Gunma University, Kiryu 376-8515 Japan
Haruo Kobayashi , Division of Electronics and Informatics, Gunma University, Kiryu 376-8515 Japan
Masanobu Tsuji , Semiconductor Technology Academic Research Center, Yokohama 222-0033 Japan
Ryoji Shiota , Semiconductor Technology Academic Research Center, Yokohama 222-0033 Japan
Masafumi Watanabe , Semiconductor Technology Academic Research Center, Yokohama 222-0033 Japan
Noriaki Dobashi , Semiconductor Technology Academic Research Center, Yokohama 222-0033 Japan
Sadayoshi Umeda , Semiconductor Technology Academic Research Center, Yokohama 222-0033 Japan
Hideyuki Nakamura , Semiconductor Technology Academic Research Center, Yokohama 222-0033 Japan
Koshi Sato , Hikari Science, Japan
pp. 1-6

Verification and validation of AMS systems: Towards coverage of uncertainties (Abstract)

Christoph Grimm , Design of Cyber-Physical Systems, TU Kaiserslautern
Carna Radojicic , Design of Cyber-Physical Systems, TU Kaiserslautern
pp. 1-6

Automated triangular wave generator design with process corners compensation (Abstract)

Yasser Moursy , Sorbonne Universités, UPMC Univ Paris 06-CNRS, UMR 7606, LIP6, F-75005, Paris, France
Ramy Iskander , Sorbonne Universités, UPMC Univ Paris 06-CNRS, UMR 7606, LIP6, F-75005, Paris, France
Marie-Minerve Louerat , Sorbonne Universités, UPMC Univ Paris 06-CNRS, UMR 7606, LIP6, F-75005, Paris, France
pp. 1-6

Substrate modeling to improve reliability of high voltage technologies (Abstract)

Camillo Stefanucci , Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland
Pietro Buccella , Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland
Yasser Moursy , Université Pierre Marie Curie (UPMC), Paris, France
Hao Zou , Université Pierre Marie Curie (UPMC), Paris, France
Ramy Iskander , Université Pierre Marie Curie (UPMC), Paris, France
Maher Kayal , Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland
Jean Michel Sallese , Ecole Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland
pp. 1-6

A CAD integrated solution of substrate modeling for industrial IC design (Abstract)

Hao Zou , Sorbonne Universités UPMC Paris 6, CNRS, LIP6 UMR 7606, 4 Place Jussieu 75005 Paris
Yasser Moursy , Sorbonne Universités UPMC Paris 6, CNRS, LIP6 UMR 7606, 4 Place Jussieu 75005 Paris
Ramy Iskander , Sorbonne Universités UPMC Paris 6, CNRS, LIP6 UMR 7606, 4 Place Jussieu 75005 Paris
Jean-Paul Chaput , Sorbonne Universités UPMC Paris 6, CNRS, LIP6 UMR 7606, 4 Place Jussieu 75005 Paris
Marie-Minerve Louerat , Sorbonne Universités UPMC Paris 6, CNRS, LIP6 UMR 7606, 4 Place Jussieu 75005 Paris
Camillo Stefanucci , Swiss Federal Institute of Technology (EPFL), Laussanne, Switzerland CH-1015
Pietro Buccela , Swiss Federal Institute of Technology (EPFL), Laussanne, Switzerland CH-1015
Maher Kayal , Swiss Federal Institute of Technology (EPFL), Laussanne, Switzerland CH-1015
Jean-Michel Sallese , Swiss Federal Institute of Technology (EPFL), Laussanne, Switzerland CH-1015
Thomas Gneiting , AdMOS GmbH Advanced Modeling Solutions, In den Gernaeckern 8, 72636 Frickenhausen
Heidrun Alius , AdMOS GmbH Advanced Modeling Solutions, In den Gernaeckern 8, 72636 Frickenhausen
Alexander Steinmair , ams AG, Unterpremstatten, Austria
Ehrenfried Seebacher , ams AG, Unterpremstatten, Austria
pp. 1-6

Smart power mixed ICs parasitic bipolar coupling issues analysis with a dedicated on-chip sensor (Abstract)

V. Tomasevic , Laboratoire d'Analyse et d'Architecture des Systèmes, CNRS, 7, Avenue du Colonel Roche, 31077 Toulouse, France
A. Steinmair , ams AG, Tobelbaderstrasse 30, 8141 Unterpremstätten, Austria
A. Boyer , Laboratoire d'Analyse et d'Architecture des Systèmes, CNRS, 7, Avenue du Colonel Roche, 31077 Toulouse, France
S. Ben Dhia , Laboratoire d'Analyse et d'Architecture des Systèmes, CNRS, 7, Avenue du Colonel Roche, 31077 Toulouse, France
B. Weiss , ams AG, Tobelbaderstrasse 30, 8141 Unterpremstätten, Austria
P. Rust , ams AG, Tobelbaderstrasse 30, 8141 Unterpremstätten, Austria
E. Seebacher , ams AG, Tobelbaderstrasse 30, 8141 Unterpremstätten, Austria
pp. 1-6
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