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Proceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing (1996)
Volume III - Software
Aug. 12, 1996 to Aug. 16, 1996
ISBN: 0-8186-7623-x
TABLE OF CONTENTS

Preface (PDF)

pp. iii
Session 1C. Compiler Optimizations

(R) Array Operation Synthesis to optimize HPF Programs (Abstract)

Gwan-Hwan Hwang , Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Jenq Kuen Lee , Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
D.-C.R. Ju , Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
pp. 0001

(R) Polynomial - Time Nested Loop Fusion with Full Parallelism (Abstract)

E.H.-M. Sha , Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
Chenhua Lang , Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
N.L. Passos , Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
pp. 0009

(R) Compiler Support for Privatization on Distributed - Memory Machines (Abstract)

D.J. Palermo , Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
E. Su , Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
E.W. Hodges, IV , Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
P. Banerjee , Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA
pp. 0017
Session 2C. Loop Partitioning

(R) On Optimal Size and Shape of Supernode Transformations (Abstract)

E. Hodzic , HaL Comput. Syst., Campbell, CA, USA
Weijia Shang , HaL Comput. Syst., Campbell, CA, USA
pp. 0025
Session 2C. Loop Partitioning

(R) Unique Sets Oriented Partitioning of Nested Loops with Non-Uniform Dependences (Abstract)

Jialin Ju , Parallel & Distributed Process. Lab., Wayne State Univ., Detroit, MI, USA
V. Chaudhary , Parallel & Distributed Process. Lab., Wayne State Univ., Detroit, MI, USA
pp. 0045
Session 3C. Performance Analysis

(R) Towards Automatic Performance Analysis (Abstract)

A.B. Sinha , Informix Software, Menlo Park, CA, USA
L.V. Kale , Informix Software, Menlo Park, CA, USA
pp. 0053

(R) Performance Analysis and Prediction of Processor Scheduling Strategies in Multiprogrammed Shared - Memory Multiprocessors (Abstract)

K.K. Yue , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
D.J. Lilja , Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
pp. 0070
Session 4C. Reducing Parallel Overheads

(R) The Impact of Speeding up Critical Sections with Data Prefetching and Forwarding (Abstract)

P. Trancoso , Center for Supercomput. Res. & Dev., Illinois Univ., Urbana, IL, USA
J. Torrellas , Center for Supercomput. Res. & Dev., Illinois Univ., Urbana, IL, USA
pp. 0079

(R) Synchronization Elimination in the Deposit Model (Abstract)

S. Hinrichs , Global Internet Software Group, Monitcello, IL, USA
pp. 0087

(R) Prefetching and Caching for Query Scheduling in a Special Class of Distributed Applications (Abstract)

A. Sinha , Parallel & Distributed Syst. Lab., Texas Univ., Austin, TX, USA
C. Chase , Parallel & Distributed Syst. Lab., Texas Univ., Austin, TX, USA
pp. 0095
Session 5C: Compiling for Shared-Memory Machines

(R) Program Analysis for Cache Coherence: Beyond Procedural Boundaries (Abstract)

L. Choi , Microprocessor Group, Intel Corp., Santa Clara, CA, USA
Pen-Chung Yew , Microprocessor Group, Intel Corp., Santa Clara, CA, USA
pp. 0103

(R) Scheduling of Wavefront Parallelism on Scalable Shared-memory Multiprocessors (Abstract)

N. Manjikian , Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
T.S. Abdelrahman , Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
pp. 0122
Session 6C. Load Balancing I
Session 7C. Processor Allocations

(R) A Flexible Processor Allocation Strategy for Mesh Connected Parallel Systems (Abstract)

V. Gupta , Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
A. Jayendran , Dept. of Comput. Sci., State Univ. of New York, Binghamton, NY, USA
pp. 0166
Session 8C. Load Balancing II
Session 9C. Systems Issues

(R) A Novel Algorithm for Buddy-Subcube Compaction in Hypercubes (Abstract)

Hsing-Lung Chen , Dept. of Electron. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Shu-Hua Hu , Dept. of Electron. Eng., Nat. Taiwan Inst. of Technol., Taipei, Taiwan
pp. 0207
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