The Community for Technology Leaders
Parallel and Distributed Systems, International Conference on (2010)
Shanghai, China
Dec. 8, 2010 to Dec. 10, 2010
ISSN: 1521-9097
ISBN: 978-0-7695-4307-9
pp: 259-266
Recently, the CUDA technology has been used to accelerate many computation demanding tasks. For example, in our previous work we have shown how CUDA technology can be employed to accelerate the process of Linear Temporal Logic (LTL) Model Checking. While the raw computing power of a CUDA enabled device is tremendous, the applicability of the technology is quite often limited to small or middle-sized instances of the problems being solved. This is because the memory that a single device is equipped with, is simply not large enough to cope with large or realistic instances of the problem, which is also the case of our CUDA-aware LTL Model Checking solution. In this paper we suggest how to overcome this limitations by employing multiple (two in our case) CUDA devices for acceleration of our fine-grained communication-intensive parallel algorithm for LTL Model Checking.
parallel LTL model checking, CUDA technology, employing multiple CUDA devices

J. Barnat, P. Bauch, M. Ceška and L. Brim, "Employing Multiple CUDA Devices to Accelerate LTL Model Checking," 2010 IEEE 16th International Conference on Parallel and Distributed Systems (ICPADS 2010)(ICPADS), Shanghai, 2010, pp. 259-266.
95 ms
(Ver 3.3 (11022016))