Formal Engineering Methods, International Conference on (2000)
Sept. 4, 2000 to Sept. 7, 2000
Toomas P. Plaks , South Bank University
This paper presents a formal method for synthesizing multilayered regular processor arrays from algorithm specification. Multilayered array is a structure where 2-D sub-arrays are connected into 3-D array only by one edge and thus, fits, for example, the structure of motherboard with FPGA daughter-boards. Synthesis of multilayered structures needs extensive use of algebraic transformations that is not possible using the classical regular array theory. We will apply the Iso-plane method that was developed for mapping reductions into regular arrays. In this paper we develop further the Iso-plane method and use it in a more general case - for decomposing a problem into parallel, loosely coupled parts (layers); provide the conditions for regular increasing the degree of parallelism in problem specification; introduce partial lexicographic orders for data propagation and provide the conditions for mapping data propagation structures onto arrays.
T. P. Plaks, "Formal Derivation of Multilayered Hardware/Software Structures," Formal Engineering Methods, International Conference on(ICFEM), York, England, 2000, pp. 5.