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Engineering of Complex Computer Systems, IEEE International Conference on (2012)
Paris, France France
July 18, 2012 to July 20, 2012
ISBN: 978-1-4673-2156-3
pp: 49-56
This work proposes an encapsulation scheme aimed at simplifying the reuse process of hardware cores. This hardware encapsulation approach has been conceived with a twofold objective. First, we look for the improvement of the reuse interface associated with the hardware core description. This is carried out in a first encapsulation level by improving the limited types and configuration options available in the conventional HDLs interface, and also providing information related to the implementation itself. Second, we have devised a more generic interface focused on describing the function avoiding details from a particular implementation, what corresponds to a second encapsulation level. This encapsulation allows the designer to define how to configure and use the design to implement a given functionality. The proposed encapsulation schemes help improving the amount of information that can be supplied with the design, and also allow to automate the process of searching, configuring and implementing diverse alternatives.
Encapsulation, Hardware, Hardware design languages, Digital signal processing, Space exploration, Documentation, XML, reuse, hardware IP core, component interface, encapsulation

M. A. S'nchez, M. Lopez-Vallejo, C. A. Iglesias and C. A. Lopez-Barrio, "Improving Hardware Reuse through XML-based Interface Encapsulation," 2012 17th International Conference on Engineering of Complex Computer Systems (ICECCS), Paris, 2012, pp. 49-56.
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