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14th International Conference on Distributed Computing Systems (1994)
Pozman, Poland
June 21, 1994 to June 24, 1994
ISBN: 0-8186-5840-1
pp: 363-370
S. Ray , Dept. of Comput. Sci. & Eng., Nebraska Univ., Lincoln, NE, USA
Hong Jiang , Dept. of Comput. Sci. & Eng., Nebraska Univ., Lincoln, NE, USA
ABSTRACT
In parallel and distributed computing, the overall system performance is significantly influenced by how a task graph representing an application is mapped onto a specific multiprocessor topology. In this paper, algorithms with improved performance are proposed to map tree and linear task graphs onto shared memory multiprocessing architectures. Specifically, the task graphs are partitioned with our algorithms so that the load is balanced, processor utilisation is maximized, and the communication demand on the interconnection network is minimized in a shared memory multiprocessor. All the proposed algorithms are polynomial in time complexity. Bottleneck and processor minimization algorithms of this type are proposed. The bandwidth minimization algorithm has a complexity of O(n + p log q) (q/spl les/p/spl les/n), in contrast with the complexity of O(n log n) for the best known algorithm in the literature. Furthermore, we have identified cases where our algorithm will run in linear time on the average.<>
INDEX TERMS
shared memory systems, computational complexity, minimisation, parallel algorithms, multiprocessor interconnection networks, graph theory
CITATION

S. Ray and Hong Jiang, "Improved algorithms for partitioning tree and linear task graphs on shared memory architecture," 14th International Conference on Distributed Computing Systems(ICDCS), Pozman, Poland, 1994, pp. 363-370.
doi:10.1109/ICDCS.1994.302437
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