2012 IEEE 30th International Conference on Computer Design (ICCD) (2003)
San Jose, California
Oct. 13, 2003 to Oct. 15, 2003
Jerzy Tyszer , Poznan University of Technology
Janusz Rajski , Mentor Graphics Corporation
In its first part, this paper examines various forms of embedded deterministic test with particular emphasis on input stimuli compression and test response compaction schemes. Subsequently, the Embedded Deterministic Test (EDT) scheme, which significantly reduces manufacturing test cost by providing a dramatic reduction in scan test data volume and scan test time, is discussed.
Jerzy Tyszer, Janusz Rajski, "Test Data Compression and Compaction for Embedded Test of Nanometer Technology Designs", 2012 IEEE 30th International Conference on Computer Design (ICCD), vol. 00, no. , pp. 331, 2003, doi:10.1109/ICCD.2003.1240915