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2012 IEEE 30th International Conference on Computer Design (ICCD) (1999)
Austin, Texas
Oct. 10, 1999 to Oct. 13, 1999
ISSN: 1063-6404
ISBN: 0-7695-0406-X
pp: 476
Mauro Olivieri , University of Rome La Sapienza
Alessandro de Gloria , University of Genoa
Alessandro Trifiletti , University of Rome La Sapienza
Clock disabling for power management has been implemented in some micro-controllers, but the wake-up time of Xtal/PLL-based systems is incompatible with fast interrupt response. On the other hand, hardwired on-chip clocking has been used for dedicated circuits. We illustrate the design issues of a general-purpose micro-controller core with a programmable on-chip fully-digital clock generator. The CPU is compatible with the PIC16C57 instruction set and supports software-controlled clocking modes - ranging from 44 MHz up to 124 MHz; on-line self-tuning of the maximum full-speed frequency in case of peak-performance requirements; ultra-fast wake-up even with totally disabled clock generator - namely 8.6 ns.
Mauro Olivieri, Alessandro de Gloria, Alessandro Trifiletti, "A Low-Power Microcontroller with on-Chip Self-Tuning Digital Clock-Generator for Variable-Load Applications", 2012 IEEE 30th International Conference on Computer Design (ICCD), vol. 00, no. , pp. 476, 1999, doi:10.1109/ICCD.1999.808583
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