The Community for Technology Leaders
IEEE/ACM International Conference on Computer Aided Design - Digest of Technical Papers (2006)
San Jose, CA
Nov. 5, 2006 to Nov. 9, 2006
ISSN: 1092-3152
ISBN: 1-59593-389-1
TABLE OF CONTENTS

Foreword (PDF)

pp. nil8

ICCAD-2006 Awards (PDF)

pp. nil9

Automatic Memory Reductions for RTL Model Verification (Abstract)

Panagiotis Manolios , College of Computing, Georgia Institute of Technology, Atlanta, Georgia 30332-0280 USA. manolios@cc.gatech.edu
Sudarshan K. Srinivasan , School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia 30332 -0250 USA. darshan@ece.gatech.edu
Daron Vroon , College of Computing, Georgia Institute of Technology, Atlanta, Georgia 30332-0280 USA. vroon@cc.gatech.edu
pp. 786-793

A Spectrally Accurate Integral Equation Solver for Molecular Surface Electrostatics (Abstract)

Shih-hsien Kuo , Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, MA 02139. skuo@mit.edu
Jacob White , Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, MA 02139. white@mit.edu
pp. 899-906

Stable and Compact Inductance Modeling of 3-D Interconnect Structures (Abstract)

Hong Li , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-1285. li73@ecn.purdue.edu
Venkataramanan Balakrishnan , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-1285. ragu@ecn.purdue.edu
Cheng-kok Koh , School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907-1285. chengkok@ecn.purdue.edu
pp. 1-6

A Fast Block Structure Preserving Model Order Reduction for Inverse Inductance Circuits (Abstract)

Hao Yu , EE. Dept., University of California, Los Angeles, CA 90095. hy255@ee.ucla.edu
Yiyu Shi , EE. Dept., University of California, Los Angeles, CA 90095. yshi@ee.ucla.edu
Lei He , EE. Dept., University of California, Los Angeles, CA 90095. lhe@ee.ucla.edu
David Smart , Analog Devices Inc., Wilmington, MA 01867. david.smart@analog.com
pp. 7-12

Practical Variation-Aware Interconnect Delay and Slew Analysis for Statistical Timing Verification (Abstract)

Xiaoji Ye , Department of ECE, Texas A&M University, College Station, TX 77843. yexiaoji@neo.tamu.edu
Peng Li , Department of ECE, Texas A&M University, College Station, TX 77843. pli@neo.tamu.edu
Frank Liu , IBM Austin Research Lab, Austin, TX 78758. frankliu@ibm.us.com
pp. 54-59

Information Theoretic Approach to Address Delay and Reliability in Long On-Chip Interconnects (Abstract)

Rohit Singhal , Computer Science, Texas A & M University
Gwan Choi , Electrical and Computer Engineering, Texas A & M University
Rabi Mahapatra , Computer Science, Texas A & M University
pp. 310-314

Design and CAD Challenges in 45nm CMOS and beyond (Abstract)

David J. Frank , IBM T.J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598. djf@us.ibm.com
Ruchir Puri , IBM T.J. Watson Research Center, P.O. Box 218, Yorktown Heights, NY 10598. ruchir@us.ibm.com
Dorel Toma , US Technology Development Center, Tokyo Electron US Holdings, Austin, TX 78741. dorel.toma@us.tel.com
pp. 329-333

An Analytical Model for Negative Bias Temperature Instability (Abstract)

Sanjay V. Kumar , Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455
Chris H. Kim , Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455
Sachin S. Sapatnekar , Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455
pp. 493-496

Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design (Abstract)

Yonghong Yang , ECE Department, Queen's University, Kingston, ON, Canada
Changyun Zhu , ECE Department, Queen's University, Kingston, ON, Canada
Zhenyu Gu , EECS Department, Northwestern University, Evanston, IL, USA
Li Shang , ECE Department, Queen's University, Kingston, ON, Canada
Robert P. Dick , EECS Department, Northwestern University, Evanston, IL, USA
pp. 575-582

Leakage Power Dependent Temperature Estimation to Predict Thermal Runaway in FinFET Circuits (Abstract)

Jung Hwan Choi , Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA. choi56@ecn.purdue.edu
Aditya Bansal , Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA. bansal@ecn.purdue.edu
Mesut Meterelliyoz , Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA. mesut@ecn.purdue.edu
Jayathi Murthy , Mechanical Engineering, Purdue University, West Lafayette, IN 47907, USA. jmurthy@ecn.purdue.edu
Kaushik Roy , Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA. kaushik@ecn.purdue.edu
pp. 583-586

Counterflow Pipelining: Architectural Support for Preemption in Asynchronous Systems using Anti-Tokens (Abstract)

Manoj Ampalam , Dept. of Computer Science, Univ. of North Carolina, Chapel Hill, NC 27599, USA. Chapel Hill, NC 27599, USA. manoj@cs.unc.edu
Montek Singh , Dept. of Computer Science, Univ. of North Carolina, Chapel Hill, NC 27599, USA. Chapel Hill, NC 27599, USA. montek@cs.unc.edu
pp. 611-618
100 ms
(Ver 3.3 (11022016))