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Computer-Aided Design, International Conference on (2003)
San Jose, CA
Nov. 9, 2003 to Nov. 13, 2003
ISSN: 1092-3152
ISBN: 1-58113-762-1
pp: 518
Praveen Kalla , Univ. of Notre Dame
Xiaobo Sharon Hu , Univ. of Notre Dame
J? Henkel , NEC Laboratories America Inc.
Leakage energy will be the major energy consumer in future deep sub-micron designs. Especially the memory sub-system of future SOCs will be negatively affected by this trend. In order to reduce the leakage energy, memory banks are transitioned to a low-energy state when possible. This transition itself costs some energy which is termed as the transition energy. In this paper we present, as the first approach of its kind, a novel energy saving replacement policy called LRU-SEQ for instruction caches. Evaluation of the policy on various architectures in a system-level environment has shown that upto 23% energy savings can be obtained. Considering the negligible hardware impact, LRU-SEQ offers a viable choice for an energy saving policy.
Praveen Kalla, Xiaobo Sharon Hu, J? Henkel, "LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches", Computer-Aided Design, International Conference on, vol. 00, no. , pp. 518, 2003, doi:10.1109/ICCAD.2003.1257860
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