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Computer-Aided Design, International Conference on (2003)
San Jose, CA
Nov. 9, 2003 to Nov. 13, 2003
ISSN: 1092-3152
ISBN: 1-58113-762-1
pp: 91
Ozgur Sinanoglu , University of California, San Diego
Alex Orailoglu , University of California, San Diego
ABSTRACT
The isolation of a core through full I/O scan helps ease SOC test challenges; yet the performance of high-speed SOCs is significantly hampered. We propose a partial core encryption methodology wherein the core vendor unveils only a small part of the core logic, successfully satisfying core IP protection requirements. Once the partially encrypted cores are merged into an SOC, the system integrator performs test generation on the visible SOC logic only, greatly reducing the test generation effort expended. By utilizing the test data provided by the core vendor as well, the SOC integrator can test the SOC with no performance degradation. We present an efficient fault analysis based core encryption algorithm which is guided by judiciously computed testability measures. The experimental results confirm the significantly high encryption levels attained by the proposed encryption algorithm.
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CITATION
Ozgur Sinanoglu, Alex Orailoglu, "Partial Core Encryption for Performance-Efficient Test of SOCs", Computer-Aided Design, International Conference on, vol. 00, no. , pp. 91, 2003, doi:10.1109/ICCAD.2003.1257592
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