High Performance Computing and Communication & IEEE International Conference on Embedded Software and Systems, IEEE International Conference on (2012)
Liverpool, United Kingdom United Kingdom
June 25, 2012 to June 27, 2012
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/HPCC.2012.199
As the Integrated Circuit (IC) process improves, the microprocessors become more and more complicated. Most microprocessors allow part of their important parameters to be reconfigured, such as the frequency, cache prefetch mechanism, and so on. Predicting the performance of reconfigurable processor is still an open question since the performance model needs to consider not only program characteristic, but also processor architecture parameters. In this paper, we propose a new performance prediction model for reconfigurable processor based on machine learning. We employ the M5P as base learners to gain better performance and custom an ensemble learner to get better accuracy. The experiment results show that the ensemble learner reduce the prediction error to 3% from 8%, which is the prediction of a single M5P learner. Furthermore, benefited from considering both program architecture independent characteristics and the architecture parameters, our model can not only predict the performance of the program under specific architecture, but also help to optimize processor's architecture and scheduling processes.
Predictive models, Architecture, Computer architecture, Analytical models, Machine learning, Accuracy, Microprocessors
D. Liu, Q. Guo, T. Chen, L. Li and Y. Chen, "Performance Prediction for Reconfigurable Processor," High Performance Computing and Communication & IEEE International Conference on Embedded Software and Systems, IEEE International Conference on(HPCC-ICESS), Liverpool, United Kingdom United Kingdom, 2012, pp. 1352-1359.