High Performance Computing and Grid in Asia Pacific Region, International Conference on (1997)
Apr. 28, 1997 to May 2, 1997
Qiao Xiangzhen , Institute of Computing Technology Chinese Academy of Sciences
A technique to enhance the cache performance of some blocked algorithms is proposed in this paper. According to the results of the Number Theory, we present a principle for array padding so that accesses of array sub- blocks do not generate conflict misses. The technique is used to calcu- late the LU factorization and matrix multiplication. The principle is tested on a shared memory multiprocessor. The practical results agree with the theoretical analysis, and 20% to 150% increasing in performance is achieved.
algorithm optimizations; cache performance; blocked method; MADF
Q. Xiangzhen, "Cache Performance and Algorithm Optimization," High Performance Computing and Grid in Asia Pacific Region, International Conference on(HPCASIA), Seoul, Korea, 1997, pp. 12.