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IEEE International Symposium on High-Performance Comp Architecture (2012)
New Orleans, LA, USA
Feb. 25, 2012 to Feb. 29, 2012
ISBN: 978-1-4673-0827-4
pp: 1-10
Augusto Vega , IBM Research Division, Yorktown Heights, NY
Pradip Bose , IBM Research Division, Yorktown Heights, NY
Alper Buyuktosunoglu , IBM Research Division, Yorktown Heights, NY
Jeff Derby , IBM Research Division, Research Triangle Park, NC
Michele Franceschini , IBM Research Division, Yorktown Heights, NY
Charles Johnson , IBM Research Division, Yorktown Heights, NY
Robert Montoye , IBM Research Division, Yorktown Heights, NY
ABSTRACT
In wireless networks, base stations are responsible for operating on large amounts of traffic at high speed rates. With the advent of new standards, as 4G, further pressure is put in the hardware requirements to satisfy speeds of up to 1 Gbps. In this work, we study the applicability and potential benefits of the IBM PowerEN processor (a multi-core, massively multithreaded platform) in the realm of base stations for the 3G and 4G standards. The approach involves exploiting the throughput computation capabilities of the PowerEN processor, replacing the bus-attached special-function accelerators with a layer of in-line universal acceleration support, incorporated within the cores. A key feature of this in-line accelerator is a bank-based very-large register file, with embedded SIMD support. This processor-in-regfile (PIR) strategy is implemented as local computation elements (LCEs) attached to each bank, overcoming the limited number of register file ports. Because each LCE is a SIMD computation element, and all of them can proceed concurrently, the PIR approach constitutes a highly-parallel super-wide-SIMD device. To target a broad spectrum of applications for base stations, we also consider a PIR-based architecture built upon reconfigurable LCEs. In this paper, we evaluate the in-line universal accelerator and the PIR strategy focusing on two specific applications for base stations: FFT and Turbo Decoding.
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CITATION

C. Johnson et al., "Architectural perspectives of future wireless base stations based on the IBM PowerENâ?˘ processor," IEEE International Symposium on High-Performance Comp Architecture(HPCA), New Orleans, LA, USA, 2012, pp. 1-10.
doi:10.1109/HPCA.2012.6169045
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