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2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) (2001)
Nuevo Leone, Mexico
Jan. 20, 2001 to Jan. 24, 2001
ISBN: 0-7695-1019-1
pp: 0063
Zhen Fang , University of Utah
Lixin Zhang , University of Utah
John B. Carter , University of Utah
Wilson C. Hsieh , University of Utah
Sally A. McKee , University of Utah
ABSTRACT
Abstract: Typical translation lookaside buffers (TLBs)can map a far smaller region of memory than applicatio footprints demand, and the cost of handling TLB misses therefore limits the performance of a increasing number of applications. This bottleneck can be mitigated by the use of superpages, multiple adjacent virtual memory pages that can be mapped with a single TLB entry, that extend TLB reach without significantly increasing size or cost. We analyze hardware/software tradeoffs for dynamically creating superpages. This study extends previous work by using execution-driven simulation to compare creating superpages via copying with remapping pages within the memory controller, and by examining how the tradeoffs change when moving from a single-issue to a superscalar processor model. We find that remapping-based promotion outperforms copying-based promotion, often significantly. Copying-based promotion is slightly more effective on superscalar processors than on single-issue processors, and the relative performance of remapping-based promotion on the two platforms is application-dependent.
INDEX TERMS
CITATION
Zhen Fang, Lixin Zhang, John B. Carter, Wilson C. Hsieh, Sally A. McKee, "Reevaluating Online Superpage Promotion with Hardware Support", 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA), vol. 00, no. , pp. 0063, 2001, doi:10.1109/HPCA.2001.903252
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