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2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) (1997)
San Antonio, TX
Feb. 1, 1997 to Feb. 5, 1997
ISBN: 0-8186-7764-3
pp: 116
P. Pattnaik , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
M. Snir , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
B-H. Lim , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
P. Heidelberger , IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
ABSTRACT
This research addresses the problem of providing efficient, protected communication in an SMP cluster without incurring the overhead of system calls or the cost of custom hardware. It analyzes an approach that uses an idle SMP processor to run a message proxy, a communication process that provides protected access to the network. We implement message proxy based communication between a pair of IBM Model G30 SMPs and analyze the resulting overheads. We derive a performance model that shows that cache-miss latency within an SMP influences message proxy performance significantly. Simulations of a suite of ten parallel applications demonstrate that message proxies match the performance of custom hardware for three of the ten applications, and are between 10-30% slower for the other seven applications. A direct cache-update mechanism to reduce cache misses improves the performance of message proxies on communication-intensive programs by 7-25%. We conclude that message proxies provide a viable alternative to custom hardware for protected communication.
INDEX TERMS
multiprocessing systems, message proxies, protected communication, symmetric multiprocessor clusters, custom hardware, IBM Model G30 SMPs, performance model, cache-miss latency, cache-update mechanism
CITATION
P. Pattnaik, M. Snir, B-H. Lim, P. Heidelberger, "Message Proxies for Efficient, Protected Communication on SMP Clusters", 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA), vol. 00, no. , pp. 116, 1997, doi:10.1109/HPCA.1997.569647
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