The Community for Technology Leaders
2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA) (1997)
San Antonio, TX
Feb. 1, 1997 to Feb. 5, 1997
ISBN: 0-8186-7764-3
pp: 84
John C. Gyllenhaal , University of Illinois, Urbana-Champaign, IL
David I. August , University of Illinois, Urbana-Champaign, IL
Daniel A. Connors , University of Illinois, Urbana-Champaign, IL
Wen-mei W. Hwu , University of Illinois, Urbana-Champaign, IL
ABSTRACT
This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler generates code sequences that, when executed, digest relevant state information and execution statistics into a condition bit, or predicate. The hardware then utilizes this information to make predictions. Two categories of such architectures are proposed and evaluated. In Predicate Only Prediction (POP), the hardware simply uses the condition generated by the code sequence as a prediction. In Predicate Enhanced Prediction (PEP), the hardware uses the generated condition to enhance the accuracy of conventional branch prediction hardware. The IMPACT compiler currently provides a minimal level of compiler support for the proposed approach. Experiments based on current predicated code show that the proposed predictors achieve better performance than conventional branch predictors. Furthermore, they enable future compiler techniques which have the potential to achieve extremely high branch prediction accuracies. Several such compiler techniques are proposed in this paper.
INDEX TERMS
CITATION
John C. Gyllenhaal, David I. August, Daniel A. Connors, Wen-mei W. Hwu, "Architectural Support for Compiler-Synthesized Dynamic Branch Prediction Strategies: Rationale and Initial Results", 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA), vol. 00, no. , pp. 84, 1997, doi:10.1109/HPCA.1997.569617
89 ms
(Ver 3.3 (11022016))