Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture (1995)
Raleigh, North Carolina
Jan. 22, 1995 to Jan. 25, 1995
O. Temam , PRiSM Lab., Versailles Univ., France
N. Drach , PRiSM Lab., Versailles Univ., France
Hardware and software cache optimizations are active fields of research, that have yielded powerful but occasionally complex designs and algorithms. The purpose of this paper is to investigate the performance of combined though simple software and hardware optimizations. Because current caches provide little flexibility for exploiting temporal and spatial locality, two hardware modifications are proposed to support these two kinds of locality. Spatial locality is exploited by using large virtual cache lines which do not exhibit the performance flaws of large physical cache lines. Temporal locality is exploited by minimizing cache pollution with a bypass mechanism that still allows to exploit spatial locality. Subsequently, it is shown that simple software informations on the spatial/temporal locality of array references, as provided by current data locality optimizing algorithms, can be used to significantly increase cache performance. The performance and design trade-offs of the proposed mechanisms are discussed. Software assisted caches are further shown to provide a convenient support for hardware and software optimizations.
cache storage; optimisation; software assistance; data caches; cache optimizations; performance; spatial locality; temporal locality; virtual cache lines; bypass mechanism
O. Temam and N. Drach, "Software assistance for data caches," Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture(HPCA), Raleigh, North Carolina, 1995, pp. 154.