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Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture (1995)
Raleigh, North Carolina
Jan. 22, 1995 to Jan. 25, 1995
ISBN: 0-8186-6445-2
pp: 78
We investigate the relative performance impact of non-blocking loads, stream buffers, and speculative execution both used individually and in conjunction with each other. We have simulated the SPEC92 benchmarks on a statically scheduled quad-issue processor model, running code from the Multiflow compiler. Non-blocking loads and stream buffers both provide a significant performance advantage, and their combination performs significantly better than either alone. For example, with a 64-byte, 2-way set associative cache with 32 cycle fetch latency, non-blocking loads reduce the run-time by 21% while stream-buffers re-duce it by 26%, and the combined use of the two yields a 47% reduction. The addition of speculative execution further improves the performance of the systems that we have simulated, with or without non-blocking loads and stream buffers, by an additional 20% to 40%. We expect that the use of all three of these techniques will be important in future generations of microprocessors.

P. Chow, K. Farkas and N. Jouppi, "How Useful Are Non-Blocking Loads, Stream Buffers and Speculative Execution in Multiple Issue Processors?," Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture(HPCA), Raleigh, North Carolina, 1995, pp. 78.
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