[Front cover] (PDF)

Tutorial: Infiniband and 10-Gigabit Ethernet for Dummies (PDF)

[Copyright notice] (PDF)

Table of contents (PDF)

Program Committee (PDF)

Title Page i (PDF)

Title Page iii (PDF)

Message from General Chair (PDF)

Message from Program Co-chairs (PDF)

Organizing Committee (PDF)

Keynote: The Other Face of On-Chip Interconnect (PDF)

Keynote: The Need for Speed in Trading Environments (PDF)

Keynote: High-Speed Networking and the Race to Zero (PDF)

Panel: Remote Direct Memory Access over the Converged Enhanced Ethernet Fabric: Evaluating the Options (PDF)

Panel: Industrial Leaders Forum (PDF)

Designing Energy-Efficient Low-Diameter On-Chip Networks with Equalized Interconnects (Abstract)

Winning with Pinning in NoC (Abstract)

Simple Fairness Protocols for Daisy Chain Interconnects (Abstract)

Adaptive Routing in Data Center Bridges (Abstract)

[Publisher's information] (PDF)

Performance Measurement of an Integrated NIC Architecture with 10GbE (Abstract)

MPI Collective Communications on The Blue Gene/P Supercomputer: Algorithms and Optimizations (Abstract)

MiAMI: Multi-core Aware Processor Affinity for TCP/IP over Multiple Network Interfaces (Abstract)

FPGA Accelerated Low-Latency Market Data Feed Processing (Abstract)

Data Center Switch Architecture in the Age of Merchant Silicon (Abstract)

Optimized Routing for Large-Scale InfiniBand Networks (Abstract)

Designing Next Generation Clusters: Evaluation of InfiniBand DDR/QDR on Intel Computing Platforms (Abstract)

Remote Direct Memory Access over the Converged Enhanced Ethernet Fabric: Evaluating the Options (Abstract)

Cost-Effective Optics: Enabling the Exascale Roadmap (Abstract)

Optics for Enabling Future HPC Systems (Abstract)

The Impact of Optics on HPC System Interconnects (Abstract)

Interconnect Challenges in a Many Core Compute Environment (Abstract)

Optical Networking for Data Center Interconnects Across Wide Area Networks (Abstract)

160Gb/s Serial Line Rates in a Monolithic Optoelectronic Multistage Interconnection Network (Abstract)

Low-Power Reconfigurable Network Architecture for On-Chip Photonic Interconnects (Abstract)

Author Index (PDF)