The Community for Technology Leaders
2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) (2013)
Austin, TX, USA USA
June 2, 2013 to June 3, 2013
ISBN: 978-1-4799-0559-1
TABLE OF CONTENTS
Papers

Cloning Physically Unclonable Functions (PDF)

Clemens Helfmeier , Semiconductor Devices, Dept. of High-Frequency and Semiconductor System Tech., Technische Universität Berlin, Germany
Christian Boit , Semiconductor Devices, Dept. of High-Frequency and Semiconductor System Tech., Technische Universität Berlin, Germany
pp. 1-6

Enhancing fault sensitivity analysis through templates (PDF)

Filippo Melzani , ST Microelectronics, Switzerland
Andrea Palomba , Politecnico di Milano, Dipartimento di Elettronica e Informazione, Italy
pp. 25-28

BISA: Built-in self-authentication for preventing hardware Trojan insertion (PDF)

Kan Xiao , Department of Electrical & Computer Engineering, University of Connecticut, USA
Mohammed Tehranipoor , Department of Electrical & Computer Engineering, University of Connecticut, USA
pp. 45-50

WordRev: Finding word-level structures in a sea of bit-level gates (PDF)

Wenchao Li , University of California, Berkeley, USA
Adria Gascon , Universitat Politècnica de Catalunya, Spain
Pramod Subramanyan , Princeton University, USA
Wei Yang Tan , University of California, Berkeley, USA
Ashish Tiwari , SRI International, USA
Sharad Malik , Princeton University, USA
Natarajan Shankar , SRI International, USA
Sanjit A. Seshia , University of California, Berkeley, USA
pp. 67-74

On-chip lightweight implementation of reduced NIST randomness test suite (PDF)

Vikram B. Suresh , Dept. of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA
Daniele Antonioli , Dept. of Electronical, Electronic and Information Engineering, University of Bologna, Italy
Wayne P. Burleson , Dept. of Electrical and Computer Engineering, University of Massachusetts, Amherst, USA
pp. 93-98

Frontside laser fault injection on cryptosystems - Application to the AES' last round - (PDF)

Assia Tria , Département Systèmes et Architectures Sécurisées (SAS), CEA-TECH, Gardanne, France
pp. 119-124

Stability analysis of a physical unclonable function based on metal resistance variations (PDF)

J. Ju , ECE Dept., University of New Mexico, USA
R. Chakraborty , Intel Corp., USA
C. Lamech , Intel Corp., USA
J. Plusquellic , ECE Dept., University of New Mexico, USA
pp. 143-150

Intellectual property protection for FPGA designs with soft physical hash functions: First experimental results (PDF)

Stephanie Kerckhof , ICTEAM/ELEN/Crypto Group, Université catholique de Louvain, Belgium
Francois Durvaux , ICTEAM/ELEN/Crypto Group, Université catholique de Louvain, Belgium
Francois-Xavier Standaert , ICTEAM/ELEN/Crypto Group, Université catholique de Louvain, Belgium
Benoit Gerard , ICTEAM/ELEN/Crypto Group, Université catholique de Louvain, Belgium
pp. 7-12

Hardware implementations of the WG-5 cipher for passive RFID tags (PDF)

Mark D. Aagaard , Dept. of Electrical and Computer Engineering, University of Waterloo, 200 University Ave West, Ontario, N2L 3G1, CANADA
Guang Gong , Dept. of Electrical and Computer Engineering, University of Waterloo, 200 University Ave West, Ontario, N2L 3G1, CANADA
Rajesh K. Mota , Dept. of Electrical and Computer Engineering, University of Waterloo, 200 University Ave West, Ontario, N2L 3G1, CANADA
pp. 29-34

A bulk built-in sensor for detection of fault attacks (PDF)

R. Possamai Bastos , TIMA Laboratory (Grenoble INP, UJF, CNRS), France
F. Sill Torres , UFMG (Dept. of Electronic Engineering), Belo Horizonte, Brazil
J.-M. Dutertre , Centre Microélectronique de Provence - Georges Charpak, Gardanne, France
M.-L. Flottes , LIRMM (Université Montpellier II / CNRS UMR 5506), France
G. Di Natale , LIRMM (Université Montpellier II / CNRS UMR 5506), France
B. Rouzeyre , LIRMM (Université Montpellier II / CNRS UMR 5506), France
pp. 51-54

On implementing trusted boot for embedded systems (PDF)

Obaid Khalid , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Carsten Rolfes , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Andreas Ibing , IT Security, Technische Universitat Munchen, Munich, Germany
pp. 75-80

Cycle-accurate information assurance by proof-carrying based signal sensitivity tracing (PDF)

Yier Jin , Department of Electrical Engineering and Computer Science, The University of Central Florida, USA
Bo Yang , Department of Electrical Engineering, Zhejiang University, China
Yiorgos Makris , Department of Electrical Engineering, The University of Texas at Dallas, USA
pp. 99-106

Side-Channel Analysis of MAC-Keccak (PDF)

Mostafa Taha , Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, 24061, USA
Patrick Schaumont , Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, 24061, USA
pp. 125-130

Error-tolerant bit generation techniques for use with a hardware-embedded path delay PUF (PDF)

J. Aarestad , University of New Mexico, USA
J. Plusquellic , University of New Mexico, USA
D. Acharyya , AdvanTest, Inc., USA
pp. 151-158

Localized electromagnetic analysis of RO PUFs (PDF)

Dominik Merli , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Johann Heyszl , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Benedikt Heinz , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Dieter Schuster , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Frederic Stumpf , Fraunhofer Research Institution for Applied and Integrated Security (AISEC), Munich, Germany
Georg Sigl , Institute for Security in Information Technology, TU München, Munich, Germany
pp. 19-24

Model building attacks on Physically Unclonable Functions using genetic programming (PDF)

Indrasish Saha , Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, West Bengal, India - 721302
Ratan Rahul Jeldi , Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, West Bengal, India - 721302
Rajat Subhra Chakraborty , Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, West Bengal, India - 721302
pp. 41-44

Design and implementation of rotation symmetric S-boxes with high nonlinearity and high DPA resilience (PDF)

Bodhisatwa Mazumdar , Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, India
Debdeep Mukhopadhyay , Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, India
Indranil Sengupta , Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, India
pp. 87-92

Malicious circuitry detection using fast timing characterization via test points (PDF)

Sheng Wei , Computer Science Department, University of California, Los Angeles, 90095, USA
Miodrag Potkonjak , Computer Science Department, University of California, Los Angeles, 90095, USA
pp. 113-118

Side channel modeling attacks on 65nm arbiter PUFs exploiting CMOS device noise (PDF)

Jeroen Delvaux , ESAT/SCD-COSIC and iMinds, KU Leuven, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium
Ingrid Verbauwhede , ESAT/SCD-COSIC and iMinds, KU Leuven, Kasteelpark Arenberg 10, B-3001 Heverlee, Belgium
pp. 137-142

Novel strong PUF based on nonlinearity of MOSFET subthreshold operation (PDF)

Mukund Kalyanaraman , Department of Electrical and Computer Engineering, The University of Texas at Austin, USA
Michael Orshansky , Department of Electrical and Computer Engineering, The University of Texas at Austin, USA
pp. 13-18

Adapting voltage ramp-up time for temperature noise reduction on memory-based PUFs (PDF)

Mafalda Cortez , Delft University of Technology, Faculty of EE, Mathematics and CS, Mekelweg 4, 2628 CD, The Netherlands
Said Hamdioui , Delft University of Technology, Faculty of EE, Mathematics and CS, Mekelweg 4, 2628 CD, The Netherlands
Vincent van der Leest , Intrinsic-ID B.V., High Tech Campus 9, Eindhoven, The Netherlands
Roel Maes , Intrinsic-ID B.V., High Tech Campus 9, Eindhoven, The Netherlands
Geert-Jan Schrijen , Intrinsic-ID B.V., High Tech Campus 9, Eindhoven, The Netherlands
pp. 35-40

Structural transformation for best-possible obfuscation of sequential circuits (PDF)

Li Li , Department of Electrical Engineering and Computer Science, Northwestern University, USA
Hai Zhou , Department of Electrical Engineering and Computer Science, Northwestern University, USA
pp. 55-60

Low-cost and area-efficient FPGA implementations of lattice-based cryptography (PDF)

Aydin Aysu , Electrical and Computer Engineering Department, Virginia Tech, Blacksburg, USA
Cameron Patterson , Electrical and Computer Engineering Department, Virginia Tech, Blacksburg, USA
Patrick Schaumont , Electrical and Computer Engineering Department, Virginia Tech, Blacksburg, USA
pp. 81-86

Pre-processing power traces with a phase-sensitive detector (PDF)

P. Hodgers , Centre for Secure Information Technologies, Queens University Belfast, United Kingdom
N. Hanley , Centre for Secure Information Technologies, Queens University Belfast, United Kingdom
M. O'Neill , Centre for Secure Information Technologies, Queens University Belfast, United Kingdom
pp. 131-136
93 ms
(Ver 3.3 (11022016))