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2011 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) (2011)
San Diego CA
June 5, 2011 to June 6, 2011
ISBN: 978-1-4577-1059-9
TABLE OF CONTENTS

Security challenges and opportunities in adaptive and reconfigurable hardware (PDF)

Victor Costan , Computer Science and Artificial Intelligence Laboratory (CSAIL), Massachusetts Institute of Technology, Cambridge, MA
Srinivas Devadas , Computer Science and Artificial Intelligence Laboratory (CSAIL), Massachusetts Institute of Technology, Cambridge, MA
pp. 1-5

TinyTPM: A lightweight module aimed to IP protection and trusted embedded platforms (PDF)

Thomas Feller , Center for Advanced Security Research Darmstadt (CASED), Darmstadt, Germany
Sunil Malipatlolla , Center for Advanced Security Research Darmstadt (CASED), Darmstadt, Germany
David Meister , Center for Advanced Security Research Darmstadt (CASED), Darmstadt, Germany
Sorin A. Huss , Center for Advanced Security Research Darmstadt (CASED), Darmstadt, Germany
pp. 6-11

Enhancing security via provably trustworthy hardware intellectual property (PDF)

Eric Love , Departments of Electrical Engineering and Computer Science, Yale University, New Haven, CT 06520-8267, USA
Yier Jin , Department of Electrical Engineering, Yale University, New Haven, CT 06520-8267, USA
Yiorgos Makris , Departments of Electrical Engineering and Computer Science, Yale University, New Haven, CT 06520-8267, USA
pp. 12-17

ODETTE: A non-scan design-for-test methodology for Trojan detection in ICs (PDF)

Mainak Banga , Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, Virginia - 24061
Michael S. Hsiao , Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, Virginia - 24061
pp. 18-23

Influence of the temperature on true random number generators (PDF)

Mathilde Soucarros , Institut Fourier, St Martin d'Hères, France
Cecile Canovas-Dumas , CESTI-LETI, Grenoble, France
Jessy Clediere , CESTI-LETI, Grenoble, France
Philippe Elbaz-Vincent , Institut Fourier, St Martin d'Hères, France
Denis Real , DGA-MI, Bruz, France
pp. 24-27

Implementation and verification of DPA-resistant cryptographic DES circuit using Domino-RSL (PDF)

Katsuhiko Iwai , Graduate School of Science and Technology, Ritsumeikan University, 1-1-1 Nojihigashi, Kusatsu, Shiga, 525-8527, Japan
Mitsuru Shiozaki , Research Organization of Science and Engineering, Ritsumeikan University, 1-1-1 Nojihigashi, Kusatsu, Shiga, 525-8527, Japan
Anh-Tuan Hoang , Research Organization of Science and Engineering, Ritsumeikan University, 1-1-1 Nojihigashi, Kusatsu, Shiga, 525-8527, Japan
Kenji Kojima , Graduate School of Science and Technology, Ritsumeikan University, 1-1-1 Nojihigashi, Kusatsu, Shiga, 525-8527, Japan
Takeshi Fujino , Department of Science and Engineering, Ritsumeikan University, 1-1-1 Nojihigashi, Kusatsu, Shiga, 525-8527, Japan
pp. 28-33

Security Checkers: Detecting processor malicious inclusions at runtime (PDF)

Michael Bilzor , U.S. Naval Postgraduate School
Ted Huffmire , U.S. Naval Postgraduate School
Cynthia Irvine , U.S. Naval Postgraduate School
Tim Levin , U.S. Naval Postgraduate School
pp. 34-39

Formal security evaluation of hardware Boolean masking against second-order attacks (PDF)

Houssem Maghrebi , Département COMELEC, Institut TELECOM, TELECOM ParisTech, CNRS LTCI (UMR 5141), 46 rue Barrault, 75 634 Paris Cedex, France
Sylvain Guilley , Département COMELEC, Institut TELECOM, TELECOM ParisTech, CNRS LTCI (UMR 5141), 46 rue Barrault, 75 634 Paris Cedex, France
Jean-Luc Danger , Département COMELEC, Institut TELECOM, TELECOM ParisTech, CNRS LTCI (UMR 5141), 46 rue Barrault, 75 634 Paris Cedex, France
pp. 40-46

TrustGeM: Dynamic trusted environment generation for chip-multiprocessors (PDF)

Luis Angel D. Bathen , Center for Embedded Computer Systems, Donald Bren School of Information & Computer Science, University of California, Irvine
Nikil D. Dutt , Center for Embedded Computer Systems, Donald Bren School of Information & Computer Science, University of California, Irvine
pp. 47-50

Performance evaluation of protocols resilient to physical attacks (PDF)

Sylvain Guilley , Institut TELECOM / TELECOM ParisTech, CNRS LTCI (UMR 5141), Département COMELEC, 46 rue Barrault, 75 634 PARIS Cedex 13, France
Laurent Sauvage , Institut TELECOM / TELECOM ParisTech, CNRS LTCI (UMR 5141), Département COMELEC, 46 rue Barrault, 75 634 PARIS Cedex 13, France
Jean-Luc Danger , Institut TELECOM / TELECOM ParisTech, CNRS LTCI (UMR 5141), Département COMELEC, 46 rue Barrault, 75 634 PARIS Cedex 13, France
Nidhal Selmane , Institut TELECOM / TELECOM ParisTech, CNRS LTCI (UMR 5141), Département COMELEC, 46 rue Barrault, 75 634 PARIS Cedex 13, France
Denis Real , DGA/Information Superiority, La Roche Marguerite, 35 174 BRUZ, France
pp. 51-56

Flexible architecture optimization and ASIC implementation of group signature algorithm using a customized HLS methodology (PDF)

Sumio Morioka , System IP Core Research Laboratories, NEC Corporation, 1753 Shimonumabe, Nakahara-ku, Kawasaki, Kanagawa 211-8666, Japan
Toshiyuki Isshiki , Information and Media Processing Laboratories, NEC Corporation, 1753 Shimonumabe, Nakahara-ku, Kawasaki, Kanagawa 211-8666, Japan
Satoshi Obana , Information and Media Processing Laboratories, NEC Corporation, 1753 Shimonumabe, Nakahara-ku, Kawasaki, Kanagawa 211-8666, Japan
Yuichi Nakamura , System IP Core Research Laboratories, NEC Corporation, 1753 Shimonumabe, Nakahara-ku, Kawasaki, Kanagawa 211-8666, Japan
Kazue Sako , Information and Media Processing Laboratories, NEC Corporation, 1753 Shimonumabe, Nakahara-ku, Kawasaki, Kanagawa 211-8666, Japan
pp. 57-62

Systematic security evaluation method against C safe-error attacks (PDF)

Dusko Karaklajic , Katholike Universiteit Leuven, ESAT/SCD-COSIC and IBBT Kasteelpark Arenberg 10, B-3001 Leuven-Heverlee, Belgium
Junfeng Fan , Katholike Universiteit Leuven, ESAT/SCD-COSIC and IBBT Kasteelpark Arenberg 10, B-3001 Leuven-Heverlee, Belgium
Ingrid Verbauwhede , Katholike Universiteit Leuven, ESAT/SCD-COSIC and IBBT Kasteelpark Arenberg 10, B-3001 Leuven-Heverlee, Belgium
pp. 63-66

Case study: Detecting hardware Trojans in third-party digital IP cores (PDF)

Xuehui Zhang , Dept. of Electrical & Computer Engineering, University of Connecticut
Mohammad Tehranipoor , Dept. of Electrical & Computer Engineering, University of Connecticut
pp. 67-70

TeSR: A robust Temporal Self-Referencing approach for Hardware Trojan detection (PDF)

Seetharam Narasimhan , Case Western Reserve University, Cleveland, Ohio, USA
Xinmu Wang , Case Western Reserve University, Cleveland, Ohio, USA
Dongdong Du , Case Western Reserve University, Cleveland, Ohio, USA
Rajat Subhra Chakraborty , Indian Institute of Technology, Kharagpur, West Bengal, India
Swarup Bhunia , Case Western Reserve University, Cleveland, Ohio, USA
pp. 71-74

Algorithmic collision analysis for evaluating cryptographic systems and side-channel attacks (PDF)

Qiasi Luo , Department of Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut 06269-2157
Yunsi Fei , Department of Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut 06269-2157
pp. 75-80

Accelerating early design phase differential power analysis using power emulation techniques (PDF)

Armin Krieg , Institute for Technical Informatics, Graz University of Technology, Austria
Christian Bachmann , Institute for Technical Informatics, Graz University of Technology, Austria
Johannes Grinschgl , Institute for Technical Informatics, Graz University of Technology, Austria
Christian Steger , Institute for Technical Informatics, Graz University of Technology, Austria
Reinhold Weiss , Institute for Technical Informatics, Graz University of Technology, Austria
Josef Haid , Design Center Graz, Infineon Technologies Austria AG, Graz, Austria
pp. 81-86

A fast power current analysis methodology using capacitor charging model for side channel attack evaluation (PDF)

Daisuke Fujimoto , Graduate School of System Informatics, Kobe University
Makoto Nagata , Graduate School of System Informatics, Kobe University
Toshihiro Katashita , Research Center for Information Security, National Institute of Advanced Industrial Science and Technology
Akihiko Sasaki , Research Center for Information Security, National Institute of Advanced Industrial Science and Technology
Yohei Hori , Research Center for Information Security, National Institute of Advanced Industrial Science and Technology
Akashi Satoh , Research Center for Information Security, National Institute of Advanced Industrial Science and Technology
pp. 87-92

Hardware security in practice: Challenges and opportunities (PDF)

Nachiketh Potlapally , Security Center of Excellence (SeCoE) Intel Corporation, Hillsboro, OR 97124
pp. 93-98

Low-cost recovery for the code integrity protection in secure embedded processors (PDF)

Nguyen Minh Huu , CEA-Leti - Centre Microélectronique de Provence, 880 route de Mimet, 13541 Gardanne, France
Bruno Robisson , CEA-Leti - Centre Microélectronique de Provence, 880 route de Mimet, 13541 Gardanne, France
Michel Agoyan , CEA-Leti - Centre Microélectronique de Provence, 880 route de Mimet, 13541 Gardanne, France
Nathalie Drach , Laboratoire d'Informatique de Paris 6 4, Place Jussieu, 75252 Paris, France
pp. 99-104

New security threats against chips containing scan chain structures (PDF)

Jean Da Rolt , LIRMM (Université Montpellier II /CNRS UMR 5506), Montpellier, France
Giorgio Di Natale , LIRMM (Université Montpellier II /CNRS UMR 5506), Montpellier, France
Marie-Lise Flottes , LIRMM (Université Montpellier II /CNRS UMR 5506), Montpellier, France
Bruno Rouzeyre , LIRMM (Université Montpellier II /CNRS UMR 5506), Montpellier, France
pp. 110

Placement of trust anchors in embedded computer systems (PDF)

Stephen Papa , Lockheed Martin Aeronautics, Fort Worth Texas & Southern Methodist University, Dallas Texas
William Casper , Lockheed Martin Aeronautics, Fort Worth Texas & Southern Methodist University, Dallas Texas
Suku Nair , HACNet Labs. Computer Science and Engineering Dept., Southern Methodist University, Dallas Texas
pp. 111-116

MARVEL — Malicious alteration recognition and verification by emission of light (PDF)

Peilin Song , IBM T. J. Watson Research Center, Yorktown Heights, NY
Franco Stellari , IBM T. J. Watson Research Center, Yorktown Heights, NY
Dirk Pfeiffer , IBM T. J. Watson Research Center, Yorktown Heights, NY
Jim Culp , IBM System and Technology Group, Hopewell Junction, NY
Al Weger , IBM T. J. Watson Research Center, Yorktown Heights, NY
Alyssa Bonnoit , IBM System and Technology Group, Hopewell Junction, NY
Bob Wisnieff , IBM T. J. Watson Research Center, Yorktown Heights, NY
Marc Taubenblatt , IBM T. J. Watson Research Center, Yorktown Heights, NY
pp. 117-121

A survey of frequently identified vulnerabilities in commercial computing semiconductors (PDF)

Kevin Gotze , Security Center of Excellence (SeCoE), Intel Corporation, Hillsboro, OR 97124
pp. 122-126

Hardware intrinsic security based on SRAM PUFs: Tales from the industry (PDF)

Helena Handschuh , Intrinsic-ID, 2033 Gateway Place, San Jose CA 95110, USA
pp. 127

Reliable and efficient PUF-based key generation using pattern matching (Abstract)

S. Devadas , Massachusetts Inst. of Technol., Cambridge, MA, USA
pp. 128-133

The Bistable Ring PUF: A new architecture for strong Physical Unclonable Functions (PDF)

Qingqing Chen , Institute for Electronic Design Automation, Technische Universität München, Munich, Germany
Gyorgy Csaba , Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, United States
Paolo Lugli , Institute for Nanoelectronics, Technische Universität München, Munich, Germany
Ulf Schlichtmann , Institute for Electronic Design Automation, Technische Universität München, Munich, Germany
Ulrich Ruhrmair , Institute for Security in Information Technology, Technische Universität München, Garching, Germany
pp. 134-141

On improving reliability of delay based Physically Unclonable Functions under temperature variations (PDF)

Raghavan Kumar , Department of Electrical and Computer Engineering, University of Massachusetts at Amherst, MA 01003, USA
Harikrishnan Kumarapillai Chandrikakutty , Department of Electrical and Computer Engineering, University of Massachusetts at Amherst, MA 01003, USA
Sandip Kundu , Department of Electrical and Computer Engineering, University of Massachusetts at Amherst, MA 01003, USA
pp. 142-147

Revisit fault sensitivity analysis on WDDL-AES (PDF)

Yang Li , The Department of Informatics, The University of Electro-Communications, 182-8585, Chofugaoka 1-15-1, Chofu-shi, Tokyo, Japan
Kazuo Ohta , The Department of Informatics, The University of Electro-Communications, 182-8585, Chofugaoka 1-15-1, Chofu-shi, Tokyo, Japan
Kazuo Sakiyama , The Department of Informatics, The University of Electro-Communications, 182-8585, Chofugaoka 1-15-1, Chofu-shi, Tokyo, Japan
pp. 148-153

Practical evaluation of DPA countermeasures on reconfigurable hardware (PDF)

Amir Moradi , Horst Görtz Institute for IT Security, Ruhr University Bochum, Germany
Oliver Mischke , Horst Görtz Institute for IT Security, Ruhr University Bochum, Germany
Christof Paar , Horst Görtz Institute for IT Security, Ruhr University Bochum, Germany
pp. 154-160

A novel fault attack against ECDSA (PDF)

Alessandro Barenghi , Dipartimento di Elettronica e Informazione, Politecnico di Milano, 20133 Milano (MI), Italy
Guido Bertoni , STMicroelectronics, 20041 Agrate Brianza (MB), Italy
Andrea Palomba , Dipartimento di Elettronica e Informazione, Politecnico di Milano, 20133 Milano (MI), Italy
Ruggero Susella , STMicroelectronics, 20041 Agrate Brianza (MB), Italy
pp. 161-166
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