20th Annual International Conference on High Performance Computing (2012)
Pune, India India
Dec. 18, 2012 to Dec. 22, 2012
Andrew Kerr , School of Electrical and Computer Engineering Georgia Institute of Technology
Eric Anger , School of Electrical and Computer Engineering Georgia Institute of Technology
Gilbert Hendry , Sandia National Laboratories
Sudhakar Yalamanchili , School of Electrical and Computer Engineering Georgia Institute of Technology
As processor architectures continue to evolve to increasingly heterogeneous and asymmetric designs, the construction of accurate performance models of execution time and energy consumption has become increasingly more challenging. Models that are constructed, are quickly invalidated by new features in the next generation of processors while many interactions between application and architecture parameters are often simply not obvious or even apparent. Consequently, we foresee a need for an automated methodology for the systematic construction of performance models of heterogeneous processors. The methodology should be founded on rigorous mathematical techniques yet leave room for the exploration and adaptation of a space of analytic models. Our current effort toward creating such an extensible, targeted methodology is Eiger. This paper describes the methodology implemented in Eiger, the specifics of Eiger's extensible implementation and the results of one scenario in which Eiger has been applied — the synthesis of performance models for use in the simulation-based design space exploration of Exascale architectures.
A. Kerr, E. Anger, G. Hendry and S. Yalamanchili, "Eiger: A framework for the automated synthesis of statistical performance models," 20th Annual International Conference on High Performance Computing(HIPC), Pune, India India, 2012, pp. 1-6.